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Data Sheet Revision 1.1
Page 2
OXCB950
OXFORD SEMICONDUCTOR LTD.
C
ONTENTS
1
1.1
2
3
PERFORMANCE COMPARISON..................................................................................................4
IMPROVEMENTS OF THE OXCB950 OVER DISCRETE SOLUTIONS:...........................................................................4
BLOCK DIAGRAM.......................................................................................................................5
PIN INFORMATION.....................................................................................................................6
4
5
6
6.1
6.2
6.2.1
6.3
6.3.1
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.5
6.6
6.6.1
6.6.2
6.6.3
6.7
6.8
7
7.1
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.2
7.3
7.3.1
7.3.2
7.4
7.4.1
7.5
7.5.1
7.5.2
7.5.3
7.6
7.6.1
7.6.2
7.6.3
7.6.4
7.7
7.7.1
PIN DESCRIPTIONS....................................................................................................................7
CONFIGURATION & OPERATION.............................................................................................11
PCI TARGET CONTROLLER .....................................................................................................12
OPERATION........................................................................................................................................................................12
CONFIGURATION SPACE.................................................................................................................................................13
CARDBUS / PCI CONFIGURATION SPACE REGISTER MAP.....................................................................................13
ACCESSING THE UART FUNCTION................................................................................................................................15
CARDBUS/PCI ACCESS TO THE INTERNAL UART....................................................................................................15
ACCESSING LOCAL CONFIGURATION REGISTERS....................................................................................................16
LOCAL CONFIGURATION AND CONTROL REGISTER ‘LCC’ (OFFSET 0X00).........................................................16
MULTI-PURPOSE I/O CONFIGURATION REGISTER ‘MIC’ (OFFSET 0X04).............................................................17
UART MIRROR REGISTER ‘UMR’ (OFFSET 0X08):....................................................................................................18
GLOBAL INTERRUPT STATUS AND CONTROL REGISTER ‘GIS’ (OFFSET 0X0C)................................................19
CARDBUS/ PCI INTERRUPT.............................................................................................................................................20
CARDBUS/PCI POWER MANAGEMENT..........................................................................................................................21
POWER MANAGEMENT VIA UART/ MIO PINS............................................................................................................21
POWER REPORTING.....................................................................................................................................................22
CARDBUS POWER MANAGEMENT.............................................................................................................................23
CARDBUS STATUS REGISTERS .....................................................................................................................................24
CARDBUS TUPLE INFORMATION...................................................................................................................................26
INTERNAL OX16C950 UART.....................................................................................................27
OPERATION – MODE SELECTION...................................................................................................................................27
450 MODE.......................................................................................................................................................................27
550 MODE.......................................................................................................................................................................27
750 MODE.......................................................................................................................................................................27
650 MODE.......................................................................................................................................................................27
950 MODE.......................................................................................................................................................................28
REGISTER DESCRIPTION TABLES .................................................................................................................................29
RESET CONFIGURATION.................................................................................................................................................33
HARDWARE RESET.......................................................................................................................................................33
SOFTWARE RESET .......................................................................................................................................................33
TRANSMITTER AND RECEIVER FIFOS...........................................................................................................................34
FIFO CONTROL REGISTER ‘FCR’................................................................................................................................34
LINE CONTROL & STATUS...............................................................................................................................................35
FALSE START BIT DETECTION....................................................................................................................................35
LINE CONTROL REGISTER ‘LCR’................................................................................................................................35
LINE STATUS REGISTER ‘LSR’....................................................................................................................................36
INTERRUPTS & SLEEP MODE .........................................................................................................................................37
INTERRUPT ENABLE REGISTER ‘IER’........................................................................................................................37
INTERRUPT STATUS REGISTER ‘ISR’........................................................................................................................38
INTERRUPT DESCRIPTION..........................................................................................................................................38
SLEEP MODE .................................................................................................................................................................39
MODEM INTERFACE.........................................................................................................................................................39
MODEM CONTROL REGISTER ‘MCR’..........................................................................................................................39