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參數(shù)資料
| 型號： | NAND01GR4B2CZA1E |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 64M X 16 FLASH 1.8V PROM, 25000 ns, PBGA63 |
| 封裝： | 9.50 X 12 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, VFBGA-63 |
| 文件頁數(shù)： | 28/64頁 |
| 文件大?。?/td> | 632K |
| 代理商： | NAND01GR4B2CZA1E |
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Device operations
NAND01G-B, NAND02G-B
34/64
6.8.4
Cache Program Error Bit (SR1)
The Cache Program Error bit can be used to identify if the previous page (page N-1) has
been successfully programmed or not in a Cache Program operation. SR1 is set to ’1’ when
the Cache Program operation has failed to program the previous page (page N-1) correctly.
If SR1 is set to ‘0’ the operation has completed successfully.
The Cache Program Error bit is only valid during Cache Program operations, during other
operations it is Don’t Care.
6.8.5
Error Bit (SR0)
The Error bit is used to identify if any errors have been detected by the P/E/R Controller. The
Error Bit is set to ’1’ when a program or erase operation has failed to write the correct data to
the memory. If the Error Bit is set to ‘0’ the operation has completed successfully. The Error
Bit SR0, in a Cache Program operation, indicates a failure on Page N.
6.8.6
SR4, SR3 and SR2 are Reserved
Table 13.
Status Register Bits
Bit
Name
Logic Level
Definition
SR7
Write Protection
'1'
Not Protected
'0'
Protected
SR6(1)
Program/ Erase/ Read
Controller
'1'
P/E/R C inactive, device ready
'0'
P/E/R C active, device busy
Cache Ready/Busy
'1'
Cache Register ready (Cache Program only)
'0'
Cache Register busy (Cache Program only)
SR5
Program/ Erase/ Read
Controller(2)
'1'
P/E/R C inactive, device ready
'0'
P/E/R C active, device busy
SR4, SR3, SR2
Reserved
Don’t Care
SR1
Cache Program Error(3)
'1'
Page N-1 failed in Cache Program operation
'0'
Page N-1 programmed successfully
SR0(1)
Generic Error
‘1’
Error – operation failed
‘0’
No Error – operation successful
Cache Program Error
‘1’
Page N failed in Cache Program operation
‘0’
Page N programmed successfully
1.
The SR6 bit and SR0 bit have a different meaning during Cache Program and Cache Read operations.
2.
Only valid for Cache Program operations, for other operations it is same as SR6.
3.
Only valid for Cache Program operations, for other operations it is Don’t Care.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NAND01GR4B2CZA1F | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory |
| NAND01GR4B2CZA6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory |
| NAND01GR4B2CZA6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory |
| NAND01GR4B2CZA6F | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory |
| NAND01GR4B2CZB1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory |
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