參數(shù)資料
型號(hào)： NAND01GR4B2CZA1E
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 64M X 16 FLASH 1.8V PROM, 25000 ns, PBGA63
封裝： 9.50 X 12 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, VFBGA-63
文件頁數(shù)： 10/64頁
文件大小： 632K
代理商： NAND01GR4B2CZA1E
Signal descriptions
NAND01G-B, NAND02G-B
18/64
3.7
Power-Up Read Enable, Lock/Unlock Enable (PRL)
The Power-Up Read Enable, Lock/Unlock Enable input, PRL, is used to enable and disable
the lock mechanism. When PRL is High, VIH, the device is in Block Lock mode.
If the Power-Up Read Enable, Lock/Unlock Enable input is not required, the PRL pin should
be left unconnected (Not Connected) or connected to VSS.
3.8
Write Enable (W)
The Write Enable input, W, controls writing to the Command Interface, Input Address and
Data latches. Both addresses and data are latched on the rising edge of Write Enable.
During power-up and power-down a recovery time of 10s (min) is required before the
Command Interface is ready to accept a command. It is recommended to keep Write Enable
high during the recovery time.
3.9
Write Protect (WP)
The Write Protect pin is an input that gives a hardware protection against unwanted program
or erase operations. When Write Protect is Low, VIL, the device does not accept any
program or erase operations.
It is recommended to keep the Write Protect pin Low, VIL, during power-up and power-down.
3.10
Ready/Busy (RB)
The Ready/Busy output, RB, is an open-drain output that can be used to identify if the P/E/R
Controller is currently active. When Ready/Busy is Low, VOL, a read, program or erase
operation is in progress. When the operation completes Ready/Busy goes High, VOH.
The use of an open-drain output allows the Ready/Busy pins from several memories to be
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the
memories is busy.
calculate the value of the pull-up resistor.
3.11
VDD Supply Voltage
VDD provides the power supply to the internal core of the memory device. It is the main
power supply for all operations (read, program and erase).
An internal voltage detector disables all functions whenever VDD is below VLKO (see
Table 22 and Table 23) or 1.5V (for 1.8V devices) to protect the device from any involuntary
program/erase during power-transitions.
Each device in a system should have VDD decoupled with a 0.1F capacitor. The PCB track
widths should be sufficient to carry the required program and erase currents.
相關(guān)PDF資料
PDF描述
NAND01GW3A0BZB1 128M X 8 FLASH 3V PROM, 35 ns, PBGA63
NAND512R4A2CZB6E 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA55
NAND512R4A0BZA6 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA63
NAND512R4A0BZB6 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA55
NAND512R4A0CZA6T 32M X 16 FLASH 1.8V PROM, 35 ns, PBGA63
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NAND01GR4B2CZA1F 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory
NAND01GR4B2CZA6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
NAND01GR4B2CZA6E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
NAND01GR4B2CZA6F 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory
NAND01GR4B2CZB1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*