
4-18
MPC565/MPC566 Reference Manual
MOTOROLA
Operation Modes
4.3.1.2
“Decompression ON” Mode
In this mode, the MPC566’s RCPU sends the two-bit aligned change of flow address to the
BBC. The BIU transfers the word portion of the address to the U-bus. The BBC continues
to pre-fetch the data from the consequent memory addresses regardless of whether the
RCPU requests them in order to supply data to the ICDU.
In the MPC566, the data coming from the instruction memory is not provided directly to
the RCPU, but loaded into the ICDU for decompression. Decompressed instruction code
together with “next instruction address” are provided to the RCPU whenever it requires
another instruction fetch.
All addresses issued by the BIU to the U-bus are transferred in parallel to the IMPU. The
IMPU compares the address of the access to its region programming. If any protection
violation is detected by the IMPU, the current U-bus access is aborted by the BIU and an
exception is signaled to the RCPU.
Show cycle and program trace access attributes accompanying the COF RCPU access only
are forwarded by the BIU along with the U-bus access. Additional information about the IP
of the compressed instruction address is provided on the U-bus data bus. Refer to
In this mode the MPC566’s ICDU DECRAM is used as a decompressor vocabulary storage
and may not be used as a general purpose RAM.
4.3.1.3
Show Cycles in “Decompression ON” Mode
In the MPC566’s “Decompression ON” mode, the instruction address consists of an
instruction base address and four bits of the instruction bit pointer. In order to provide the
capability to show full instruction address, including instruction bit pointer on the external
bus, show cycle information is presented not only on the address bus, but also on some bits
of the data bus:
ADDR[0:29] – show the value of the base address of compressed instruction (word
pointer into the memory)
DATA[0] – shows in which mode the MPC566 is operating
0 = “Decompression OFF” mode
1 = “Decompression ON” mode
DATA[1:4] – represent an instruction bit pointer within the word.
NOTE