參數(shù)資料
型號: MFRC53101T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: ISO-IEC 14443 reader IC
封裝: MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 51, 2004,;MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<
文件頁數(shù): 14/116頁
文件大?。?/td> 862K
代理商: MFRC53101T
MFRC531_34
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.4 — 26 January 2010
056634
14 of 116
NXP Semiconductors
MFRC531
ISO/IEC 14443 reader IC
Remark:
The following points apply to initialization:
the Page register (addressed using 10h, 18h, 20h, 28h) is skipped and not initialized.
make sure that all PreSetxx registers are not changed.
make sure that all register bits that are reserved are set to logic 0.
9.2.2.1
StartUp register initialization file (read/write)
The EEPROM memory block address 1 and 2 contents are used to automatically set the
register subaddresses 10h to 2Fh during the initialization phase. The default values stored
in the EEPROM during production are shown in
Section 9.2.2.2 “Factory default StartUp
register initialization file”
.
The byte assignment is shown in
Table 14
.
Table 14.
EEPROM byte address
10h (block 1, byte 0)
11h
2Fh (block 2, byte 15)
9.2.2.2
Factory default StartUp register initialization file
During the production tests, the StartUp register initialization file is initialized using the
default values shown in
Table 15
. During each power-up and initialization phase, these
values are written to the MFRC531’s registers.
Byte assignment for register initialization at start-up
Register address
10h
11h
2Fh
Remark
skipped
copied
copied
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