參數(shù)資料
型號： MC68HC55CD
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 4 CHANNEL(S), SERIAL COMM CONTROLLER, PDSO16
封裝： SOIC-16
文件頁數(shù)： 9/40頁
文件大?。?/td> 284K
代理商： MC68HC55CD
MC68HC55 Technical Data
DSI Channel Enable Bits
MC68HC55
Technical Data
Registers and Bit Descriptions
17
3.5 DSI Channel Enable Bits
This read/write register is used to enable or disable each DSI channel.
When a DSI channel is disabled, its DSIxF pin is high and its DSIxS pin
is low which forces the DSI/P device to three-state its bus outputs.
Disabling a DSI channel clears the transmit and receive FIFOs for that
NOTE:
Bits [7:2] are reserved and read as 0s. These bits could be used in future
versions of the MC68HC55.
EN1 — Enable for DSI Channel 1 Bit
0 = DSI channel 1 disabled;
DSI1F pin = high (1), DSI1S pin = low (0)
1 = DSI channel 1 enabled; operates normally
EN0 — Enable for DSI Channel 0 Bit
0 = DSI channel 0 disabled;
DSI0F pin = high (1), DSI0S pin = low (0)
1 = DSI channel 0 enabled; operates normally
Address:
$111
Bit 7
654321
Bit 0
Read:
000000
EN1
EN0
Write:
Reset:
0
Figure 3-8. DSI Channel Enable Bits (DSIENABLE)
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