參數(shù)資料
型號(hào)： MC68HC55CD
廠商： FREESCALE SEMICONDUCTOR INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 4 CHANNEL(S), SERIAL COMM CONTROLLER, PDSO16
封裝： SOIC-16
文件頁(yè)數(shù)： 20/40頁(yè)
文件大小： 284K
代理商： MC68HC55CD
MC68HC55 Technical Data
SPI Communications
MC68HC55
Technical Data
Functional Description
27
The RX_FULL state is entered when enough data has been pushed into
the FIFO from the DSI to cause the push pointer to catch up to the pop
pointer. Since it is not possible to introduce another DSI serial character
without reading (pop) the receive FIFO, it is not possible to overflow the
receive FIFO.
4.4 SPI Communications
The DSI/D is a slave peripheral device which is designed to interface to
a Freescake SPI configured as a master with CPHA = CPOL = 0. When
the MC68HC55 is deselected (CS pin at logic 1), CS, DI, and CLK are
all high-impedance inputs, and DO is disabled (forced to a
high-impedance state).
The first SPI transfer, after CS is driven from high to low (to select the
MC68HC55), is considered a read or write command to the DSI/D
(called a command transfer). Bit 7 of the command specifies a write (1)
or read (0) command while bits 2, 1, and 0 of the command specify the
address of one of the eight registers in the DSI/D. This command
establishes an internal register pointer. Data sent back to the master
MCU from the DSI/D during a command transfer is the read data from
the address previously pointed to (0s for the first transfer after reset).
Any additional SPI transfers that occur while CS remains low are called
data transfers. These additional data transfers write and/or read
successive DSI/D registers. The internal register pointer is incremented
after each data transfer and automatically rolls over from 7 (111) to 0
(000).
During read data transfers, the data sent from the DSI/D (DO) to the
MCU (MISO) is data that was read from the selected DSI/D register at
the end of the previous SPI transfer. Data sent from the master MCU
(MOSI) to the DSI/D (DI) is ignored. The internal DSI/D register pointer
is incremented at the end of the transfer (rolls over to 000 if it was 111
during this transfer).
During write data transfers, the data sent from the DSI/D (DO) to the
MCU (MISO) is data that was read from the selected DSI/D register at
the end of the previous SPI transfer (or at the falling edge of CS). Data
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