參數(shù)資料
型號： MC68HC55CD
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 4 CHANNEL(S), SERIAL COMM CONTROLLER, PDSO16
封裝： SOIC-16
文件頁數(shù)： 28/40頁
文件大?。?/td> 284K
代理商： MC68HC55CD
MC68HC55 Technical Data
Technical Data
MC68HC55
34
Timing and Electrical Specifications
5.2 DC Electrical Characteristics
5.3 Timing Characteristics for DSI/D to DSI/P Interface
This section describes the AC timing characteristics of the DSI/D to
DSI/P interface pins (DSIxF, DSIxS, DSIxR). The signal bit time is
derived by dividing the master clock input (SCLK) by 3, 6, 12, or 24 (see
description of CDIVx[B:A] control bits). The bit time (tBit) is
then used as the basis for other timing specifications.
Parameter(1)
Symbol
Min
Max
Units
Supply current
SCLK = 450 kHz
IDD
—3
mA
Input high voltage
SCLK, CLK, DI, CS, RESET, DSI1R, DSI0R
VIH
0.7*VDD
VDD+0.3
V
Input low voltage
SCLK, CLK, DI, CS, RESET, DSI1R, DSI0R
VIL
–0.3
0.3*VDD
V
Output high voltage (@IOH = –800 A)
DO, INT, DSI1F, DSI0F, DSI1S, DSI0S
VOH
0.8*VDD
VDD
V
Output low voltage (@IOL = 800 A)
DO, INT, DSI1F, DSI0F, DSI1S, DSI0S
VOL
0.0
0.2*VDD
V
Input leakage
SCLK, CLK, DI, CS, RESET, DSI1R, DSI0R
IIn
—
±10
A
I/O port three-state leakage
DO
IOZ
—
±10
A
1. 4.5 volts
≤ VDD ≤ 5.5 volts; –40°C ≤ TAMB ≤ 85°C
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