參數(shù)資料
型號(hào)： M306H3FCFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP116
封裝： 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件頁數(shù)： 34/135頁
文件大?。?/td> 2583K
代理商： M306H3FCFP
Rev.1.00
2004.03.23
page 129 of 320
M306H3MC-XXXFP/FCFP
(c) TxD and RxD I/O Polarity Inverse Function
This function inverses the polarities of the TXDi pin output and RXDi pin input. The logic levels of all
input/output data (including the start, stop and parity bits) are inversed. Figure 2.11.19 shows the TXD
pin output and RXD pin input polarity inverse.
Figure 2.11.19. TXD and RXD I/O Polarity Inverse
(b) Serial Data Logic Switching Function
The data written to the UiTB register has its logic reversed before being transmitted. Similarly, the
received data has its logic reversed when read from the UiRB register. Figure 2.11.18 shows serial
data logic.
Figure 2.11.18. Serial Data Logic Switching
Transfer clock
“H”
“L”
D0
D1
D2
D3
D4
D5
D6
D7
P
SP
ST
TxDi
(no reverse)
“H”
“L”
TxDi
(reverse)
SP
STD3
D4
D5
D6
D7
P
D0
D1
D2
“H”
“L”
(1) When the UiC1 register's UiLCH bit = 0 (no reverse)
(2) When the UiC1 register's UiLCH bit = 1 (reverse)
Transfer clock
“H”
“L”
Note: This applies to the case where the UiC0 register’s CKPOL bit = 0 (
transmit data output at the falling edge of the transfer clock), the
UiC0 register's UFORM bit = 0 (LSB first), the UiMR register's
STPS bit = 0 (1 stop bit) and UiMR register's PRYE bit = 1 (parity
enabled).
ST : Start bit
P : Parity bit
SP : Stop bit
i = 0 to 2
(1) When the UiMR register's IOPOL bit = 0 (no reverse)
(2) When the UiMR register's IOPOL bit = 1 (reverse)
Note: This applies to the case where the UiC0 register's UFORM bit = 0
(LSB first), the UiMR register's STPS bit = 0 (1 stop bit) and the
UiMR register's PRYE bit = 1 (parity enabled).
ST : Start bit
P : Parity bit
SP : Stop bit
i = 0 to 2
D0
D1
D2
D3
D4
D5
D6
D7
P
SP
ST
SP
STD3
D4
D5
D6
D7
P
D0
D1
D2
D0
D1
D2
D3
D4
D5
D6
D7
P
SP
ST
“H”
SP
STD3
D4
D5
D6
D7
P
D0
D1
D2
Transfer clock
TxDi
(no reverse)
RxDi
(no reverse)
Transfer clock
TxDi
(reverse)
RxDi
(reverse)
“L”
“H”
“L”
“H”
“L”
“H”
“L”
“H”
“L”
“H”
“L”
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