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參數(shù)資料
| 型號(hào)： | LXT6251A |
| 英文描述： | ATM/SONET MAPPER|CMOS|QFP|208PIN|PLASTIC |
| 中文描述： | 的ATM / SONET的映射器|的CMOS | QFP封裝| 208PIN |塑料 |
| 文件頁(yè)數(shù)： | 29/76頁(yè) |
| 文件大?。?/td> | 995K |
| 代理商： | LXT6251A |
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21 E1 SDH Mapper
—
LXT6251A
Datasheet
29
4.3
High Order Path Adaptation
After low order path termination, the completed 35 byte by 4 multiframe VC-12 data enters the
HPA block. At this stage, the four pointer bytes V1-V4 are added to complete the 36 byte by 4
multiframe TU-12. Since there is no mechanism that would require pointer processing, the V1 and
V2 bytes are statically set with a pointer value of 16, the New Data Flag set to the normal value of
‘
0110
’
and the SS bits set to 01, identifying the payload as E1 traffic. The values of V3 and V4 are
set to
‘
00
’
h.
With all 21 tributaries generated up to the TU-12 level, the final stage of the HPA block formats the
data into the appropriate higher order path container. In STM-0, the output is a 86 byte by 9 column
C3 container, consisting of seven interleaved TUG-2 structures and the two columns of fixed stuff
at columns 30 and 59. In STM-1, the output is an 86 byte by 9 column TUG-3 structure consisting
of seven interleaved TUG-2 structures and the two columns of fixed stuff at columns 1 and 2. The
TUG-3 data is output onto the MTBDATA bus when MTBTUGEN is a
‘
1
’
. When the
MTBTUGEN is
‘
0
’
, the output is in tri-state, allowing other LXT6251A devices to share the
MTBDATA bus. For configurations where each LXT6251A is installed on separate cards
interconnected via a backplane, the MTBDOE pin can be used to drive the enable pin of an external
tri-state driver. The signal is high whenever the MTBDATA bus contains valid data.
The final output also includes an odd parity bit on the MTBPAR pin calculated over the output
MTBDATA byte.
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