參數(shù)資料
型號(hào)： LXT6251A
英文描述： ATM/SONET MAPPER|CMOS|QFP|208PIN|PLASTIC
中文描述： 的ATM / SONET的映射器|的CMOS | QFP封裝| 208PIN |塑料
文件頁(yè)數(shù)： 12/76頁(yè)
文件大?。?/td> 995K
代理商： LXT6251A
LXT6251A
—
21 E1 SDH Mapper
12
Datasheet
145
DTD21
O
HiZ - 2mA
Receive Tributary NRZ Data Port # 21
42
DTC1
O
HiZ - 2mA
Receive Tributary Clock Port # 1.
Received E1 clock at 2.048 MHz
recovered from VC-12. This clock is gapped, data is valid on the
falling edge.
49
DTC2
O
HiZ - 2mA
Receive Tributary Clock Port # 2
56
DTC3
O
HiZ - 2mA
Receive Tributary Clock Port # 3
63
DTC4
O
HiZ - 2mA
Receive Tributary Clock Port # 4
64
DTC5
O
HiZ - 2mA
Receive Tributary Clock Port # 5
72
DTC6
O
HiZ - 2mA
Receive Tributary Clock Port # 6
73
DTC7
O
HiZ - 2mA
Receive Tributary Clock Port # 7
84
DTC8
O
HiZ - 2mA
Receive Tributary Clock Port # 8
85
DTC9
O
HiZ - 2mA
Receive Tributary Clock Port # 9
93
DTC10
O
HiZ - 2mA
Receive Tributary Clock Port # 10
94
DTC11
O
HiZ - 2mA
Receive Tributary Clock Port # 11
101
DTC12
O
HiZ - 2mA
Receive Tributary Clock Port # 12
107
DTC13
O
HiZ - 2mA
Receive Tributary Clock Port # 13
114
DTC14
O
HiZ - 2mA
Receive Tributary Clock Port # 14
115
DTC15
O
HiZ - 2mA
Receive Tributary Clock Port # 15
123
DTC16
O
HiZ - 2mA
Receive Tributary Clock Port # 16
124
DTC17
O
HiZ - 2mA
Receive Tributary Clock Port # 17
134
DTC18
O
HiZ - 2mA
Receive Tributary Clock Port # 18
135
DTC19
O
HiZ - 2mA
Receive Tributary Clock Port # 19
143
DTC20
O
HiZ - 2mA
Receive Tributary Clock Port # 20
144
DTC21
O
HiZ - 2mA
Receive Tributary Clock Port # 21
Telecom Bus Interface
Table 2. Pin Descriptions (Continued) (Sheet 4 of 7)
Pin #
Name
Type
Function
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