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| 型號： | IBM32NPR100EXXCAB133 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 23/131頁 |
| 文件大小： | 1679K |
| 代理商： | IBM32NPR100EXXCAB133 |
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PRS28.4G
IBM Packet Routing Switch
prs28.03.fm
August 31, 2000
Architecture
Page 23 of 131
2.2.1.1 External Speed Expansion
When multiple islands are running in speed expansion, one is master and the others are slaves. The master
device is the one which receives the byte stream containing the qualifier byte, bit map, and output queue
grant. The master device also performs packet routing and queuing. The slave devices only receive data
bytes, and do not perform any packet routing and queuing. The address of packets in shared memory is
provided by the master, and is the same for all devices. Furthermore, the slave devices’ internal sequencers
are all synchronized on the master sequencer in order to transmit the LUsat the same time on a given port.
LUs of a packet incoming on a port have to arrive at all devices within a two-byte interval.
2.2.1.2 Internal Speed Expansion
Ports of one island can also be paired to double the port speed while reducing the number of input and output
ports to eight. Each pair of ports is built of one master port and one slave port, which have exactly the same
functions as the ports of master or slave islands in external speed expansion.
2.2.2 Port Expansion
Port expansion allows multiple islands to be interconnected in parallel, in a single stage, in order to increase
the number of physical ports, while keeping the port speed constant.
An external function must be provided to:
Duplicate incoming packets and insert the correct bit map used by each island
Merge traffic from different islands
The same external function can also instruct an island to transmit by controlling the send grants, according to
the queue-empty status, for instance.
Port expansion can be combined with speed expansion (internal and/or external) to increase port speed and
the number of ports at the same time.
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