參數(shù)資料
型號： HMS30C2000
英文描述： [Application Specific Solution Product]
中文描述： [專用解決方案產(chǎn)品]
文件頁數(shù)： 6/161頁
文件大?。?/td> 973K
代理商： HMS30C2000
HMS30C7110
2003 MagnaChip Semiconductor Ltd. All Rights Reserved
Version 1.5
6
Figures
Figure 1.1 HMS30C7110
Block Diagram.................................................................16
Figure 1.2 HMS30C7110
208-Pin PQFP Assignment (top view)...........................25
Figure 2.1 Block Diagram of Clock Module ...............................................................46
Figure 2.2 Block Diagram of External controller ......................................................53
Figure 2.3 Read cycle timing (setup = 4, access = 6, hold = 4) ...............................56
Figure 2.4 Write timing (setup = 4, access = 6, hold = 4) ........................................56
Figure 2.5 Block Diagram of SDRAM controller........................................................58
Figure 2.6 Read/Write cycle .......................................................................................64
Figure 2.7 Refresh cycle.............................................................................................64
Figure 2.8 Initialization timing ....................................................................................66
Figure 2.9 Block Diagram of Ethernet MAC ..............................................................68
Figure 2.10 Block Diagram of UART Device.............................................................96
Figure 2.12 Block Diagram of SPI ............................................................................118
Figure 2.13 Arbitration Block Diagram ....................................................................130
Figure 3.1 SDRAM Clock Timing..............................................................................152
Figure 3.2 MDC Timing (Ethernet)...........................................................................152
Figure 3.3 SPI Clock Timing.....................................................................................152
Figure 3.4 SDRAM Timing Diagram .........................................................................153
Figure 3.5 Ethernet MII Timing Diagram (100Mbps) ..............................................154
Figure 3.6 Ethernet MII Timing Diagram (10Mbps).................................................155
Figure 3.7 Ethernet RMII Timing Diagram...............................................................156
Figure 3.8 SPI Timing Diagram.................................................................................157
Figure 4.1 Mechanical Characteristics.....................................................................160
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