8 GHz fractionaL-n PLL For price, deli" />
參數(shù)資料
型號(hào): HMC704LP4E
廠商: Hittite Microwave Corporation
文件頁數(shù): 38/44頁
文件大小: 0K
描述: IC FRACT-N PLL 16BIT 24QFN
標(biāo)準(zhǔn)包裝: 1
類型: 整數(shù) N/小數(shù) N 分頻
PLL:
輸入: CMOS
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 是/無
頻率 - 最大: 8GHz
除法器/乘法器: 是/無
電源電壓: 3.3V,5V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN 裸露焊盤(4x4)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 1127-1066-6
P
LL
s
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s
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5 - 43
HMC704LP4E
v03.1211
8 GHz fractionaL-n PLL
For price, delivery, and to place orders: Hittite Microwave Corporation,20 Alpha Road, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
table 25. reg 0ch Exact frequency register
BIT
TYPE
NAME
W
DEFLT
DEsCRIPTION
[13:0]
R/W
Number of Channels per Fpd
14
0
Comparison Frequency divided by the channel spacing. Must be an
integer. Frequencies at multiples of the channel spacing will have
zero frequency error. Only works in modulator Mode B. Must be 0
otherwise
0: Disabled
1: Disabled
2 to16383d (3FFFh) allowed
table 26. reg 0fh GPo register
BIT
TYPE
NAME
W
DEFLT
DEsCRIPTION
[4:0]
R/W
gpo_select
5
1
signal selected here is output to sDO pin when enabled
0: Data from Reg0F[5]
1: Lock Detect Output
2. Lock Detect Trigger
3: Lock Detect Window Output
4: Ring Osc Test
5. Pullup Hard from CsP
6. PullDN hard from CsP
7. Reserved
8: Reference Buffer Output
9: Ref Divider Output
10: VCO divider Output
11. Modulator Clock from VCO divider
12. Auxiliary Clock
13. Aux sPI Clock
14. Aux sPI Enable
15. Aux sPI Data Out
16. PD DN
17. PD UP
18. sD3 Clock Delay
19. sD3 Core Clock
20. Autostrobe Integer Write
21. Autostrobe Frac Write
22. Autostrobe Aux sPI
23. sPI Latch Enable
24. VCO Divider sync Reset
25. seed Load strobe
26.-29 Not Used
30. sPI Output Buffer En
31. soft RsTB
[5]
R/W
GPO Test Data
1
0
1 - GPO Test Data when GPO_select = 0
[6]
R/W
Prevent Automux sDO
1
0
1- inhibits Automux of the sPI sDO line with Lock Detect
[7]
R/W
Prevent Driver Disable
1
0
1- Prevents sPI from disabling sDO. should be 1 if using HMC sPI
mode.
[8]
R/W
Disable PFET
1
0
Disable PFET
[9]
R/W
Disable NFET
1
0
Disable NFET
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