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參數(shù)資料
| 型號(hào)： | HMC704LP4E |
| 廠商： | Hittite Microwave Corporation |
| 文件頁數(shù)： | 14/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRACT-N PLL 16BIT 24QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 整數(shù) N/小數(shù) N 分頻 |
| PLL： | 是 |
| 輸入： | CMOS |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 8GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.3V，5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN 裸露焊盤（4x4） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 1127-1066-6 |
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P
LL
s
-
s
M
T
5 - 21
HMC704LP4E
v03.1211
8 GHz fractionaL-n PLL
For price, delivery, and to place orders: Hittite Microwave Corporation,20 Alpha Road, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
With this simplification the total integrated VCO phase noise,
2
ν
Φ , in rads2 is given by
where
( )
2
0
f
Φ
is the single sideband phase noise in rads2/Hz inside the loop bandwidth, and
B is the 3dB corner frequency of the closed loop PLL
The integrated phase noise at the phase detector,
, is just scaled by N2 ie.
The rms phase jitter of the VCO (
) in rads, is just the square root of the phase noise integral.
since the simple integral of (EQ 5) is just a product of constants, we can easily do the integral in the log domain. For
example if the phase noise inside the loop is -110dBc/Hz at 10kHz offset and the loop bandwidth is 100kHz, and the di-
vision ratio is 100, then the integrated phase noise at the phase detector, in dB, is given by;
, or equivalently
95
20
10
Φ=
= 18urads = 1 milli-degrees
rms.
While the phase noise reduces by a factor of 20logN after division to the reference, due to the increased period of the
PD reference signal, the jitter is constant.
The rms jitter from the phase noise is then given by
2
jpn
pd
TT
π
=
Φ
In this example if the PD reference was 50MHz, Tpd = 20nsec, and hence Tjpn = 56 femto-sec.
PD Window Based Lock Detect
Lock Detect Enable “Reg 0Bh”[3]=1 is a global enable for all lock detect functions.
The window based Lock Detect circuit effectively measures the difference between the arrival of the reference and the
divided VCO signals at the PD. The arrival time difference must consistently be less than the Lock Detect window
length, to declare lock. Either signal may arrive first, only the difference in arrival times is counted.
φ
2 f
o
()
fo
B
φ
2 f()
r2 Hz
ф(t)
фrms
Figure 30. Synthesizer Phase Noise and Jitter
(EQ 5)
( )
22
0
fB
ν
π
Φ= Φ
2
pd
Φ
2
pd
N
ν
Φ
Φ=
v
Φ
( )
(
)
2
0
10log
= -110 + 5 +50 - 40 = -95 dBrads
pddB
f
N
Φ
=
Φ
βπ
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| HMC704LP4ETR | 制造商:Hittite Microwave Corp 功能描述:IC FRACT-N PLL 16BIT 24QFN |
| HMC705LP4 | 制造商:HITTITE 制造商全稱:Hittite Microwave Corporation 功能描述:6.5 GHz PROGRAMMABLE DIVIDER (N = 1 - 17) |
| HMC705LP4E | 制造商:Hittite Microwave Corp 功能描述:IC DIVIDER HBT PROGR 24-QFN |
| HMC705LP4ETR | 功能描述:IC DIVIDER HBT PROGR 24QFN 制造商:analog devices inc. 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 功能:分頻器 頻率:100MHz ~ 6.5GHz RF 類型:- 輔助屬性:- 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商器件封裝:24-QFN（4x4） 標(biāo)準(zhǔn)包裝:1 |
| hmc706lc3c | 制造商:Hittite Microwave Corp 功能描述:IC CONV NRZ-RZ 13GBPS 16SMD |
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