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參數(shù)資料
| 型號： | GM72V66841Exx |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 2,097,152 WORD x 8 BIT x 4 BANK SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 2097152字× 8位× 4個(gè)銀行同步動(dòng)態(tài)RAM |
| 文件頁數(shù)： | 19/57頁 |
| 文件大小： | 592K |
| 代理商： | GM72V66841EXX |
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LG Semicon
GM72V66841CT/CLT
Burst Length
Write Operation
Burst write or single write mode is selected by
the OPCODE(A13, A12,A11, A10, A9, A8) of
the mode register.
1. Burst write:
A burst write operation is enabled by setting
OPCODE(A9, A8) to (0, 0). A burst write starts
in the same cycle as a write command set. (The
latency of data input is 0.) The burst length can
be set to 1, 2, 4, 8 and full page, like burst read
operations. The write start address is specified
by
the
column
address
GM72V66841CT/CLT
) and the bank select address
(A12/A13) at the write command set cycle.
(
AY0
to
AY8;
CLK
Dout
BL = 1
BL = 2
BL = 4
BL = Burst Length
CAS Latency = 2
BL = 8
t
RCD
Active
Read
Row
Column
out 1
out 1
out 2
out 3
out 1
out 2
out 3
out 4
out 5
out 6
out 7
2. Single write:
A single write operation is enabled by setting
OPCODE (A9, A8) to (1, 0). In a single write
operation, data is only written to the column
address (
AY0 to AY8; GM72V66841CT/CLT
) and
the bank select address (A12/A13) specified by
the write command set cycle without regard to
the burst length setting. (The latency of data
input is 0.)
BL = Full Page
out 1
out 2
out 3
out 4
out 5
out 6
out 7
out 8
out 0
out 0
out 0
out 0
out 0
18
out 0-1
out 0
out 1
Address
Command
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