參數(shù)資料
型號(hào): DS3106LN+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 56/92頁(yè)
文件大?。?/td> 0K
描述: IC TIMING LINE CARD 64-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 160
類型: 定時(shí)卡 IC,多路復(fù)用器
PLL:
主要目的: 以太網(wǎng),SONET/SDH,Stratum,電信
輸入: CMOS,TTL
輸出: CMOS,LVDS,LVPECL,TTL
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 312.5MHz
電源電壓: 1.62 V ~ 1.98 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 1429 (CN2011-ZH PDF)
DS3106
6
1. Standards Compliance
Table 1-1. Applicable Telecom Standards
SPECIFICATION
SPECIFICATION TITLE
ANSI
T1.101
Synchronization Interface Standard, 1999
TIA/EIA-644-A
Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits, 2001
ETSI
EN 300 417-6-1
Transmission and Multiplexing (TM); Generic requirements of transport functionality of
equipment; Part 6-1: Synchronization layer functions, v1.1.3 (1999-05)
EN 300 462-3-1
Transmission and Multiplexing (TM); Generic requirements for synchronization networks; Part
3-1: The control of jitter and wander within synchronization networks, v1.1.1 (1998-05)
EN 300 462-5-1
Transmission and Multiplexing (TM); Generic requirements for synchronization networks; Part
5-1: Timing characteristics of slave cocks suitable for operation in Synchronous Digital
Hierarchy (SDH) Equipment, v1.1.2 (1998-05)
IEEE
IEEE 1149.1
Standard Test Access Port and Boundary-Scan Architecture, 1990
ITU-T
G.783
Characteristics of synchronous digital hierarchy (SDH) equipment functional blocks (10/2000
plus Amendment 1 06/2002 and Corrigendum 2 03/2003)
G.813
Timing characteristics of SDH equipment slave clocks (SEC) (03/2003)
G.823
The control of jitter and wander within digital networks which are based on the 2048 kbit/s
hierarchy (03/2000)
G.824
The control of jitter and wander within digital networks which are based on the 1544 kbit/s
hierarchy (03/2000)
G.825
The control of jitter and wander within digital networks which are based on the synchronous
digital hierarchy (SDH) (03/2000)
G.8261
Timing and synchronization aspects in packet networks (05/2006, prepublished)
G.8262
Timing characteristics of synchronous Ethernet equipment slave clock (EEC) (08/2007,
prepublished)
TELCORDIA
GR-253-CORE
SONET Transport Systems: Common Generic Criteria, Issue 3, September 2000
GR-1244-CORE
Clocks for the Synchronized Network: Common Generic Criteria, Issue 2, December 2000
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