參數(shù)資料
型號: DAC1617D1G0HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
封裝: DAC1617D1G0HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813-3.html<1<Always Pb-free,;DAC1617D1G0HN/C1<SOT813-3 (HVQFN72)|<<http://www.nxp.com/packages/SOT813
文件頁數(shù): 31/66頁
文件大?。?/td> 519K
代理商: DAC1617D1G0HN
DAC1617D1G0
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1.1 — 30 September 2011
31 of 66
NXP Semiconductors
DAC1617D1G0
Dual 16-bit DAC: up to 1 Gsps; x2, x4 and x8 interpolating
The cascode source configuration increases the output impedance of the source, which
improves the dynamic performance of the DAC because there is less distortion.
Depending on the application, the various stages and the targeted performances, the
device can be used for an output level of up to 2 V (p-p).
10.15 Auxiliary DACs
The DAC1617D1G0 integrates two auxiliary DACs, which are used to compensate any
offset between the DACs and the next stage in the transmission path. Both auxiliary DACs
have a 10-bit resolution and are current sources (referenced to ground).
The full-scale output current for each DAC is the sum of the two complementary current
outputs:
The output current depends on the digital input data set by SPI registers
DAC_A_Aux_MSB (bits AUX_A[9:0]) and DAC_B_Aux_MSB (bits AUX_B[9:0]; see
Table 33
).
(9)
(10)
(11)
(12)
Fig 21. Equivalent analog output circuit
001aan835
RL
IOUTAP/IOUTBP
IOUTAN/IOUTBN
3.3 V
GND
GND
RL
3.3 V
I
OAUXA fs
I
AUXAP
I
AUXAN
+
=
I
OAUXB fs
I
AUXBP
I
AUXBN
+
=
I
AUXAP
I
OAUXA fs
1023
-------------------
=
I
AUXAN
I
OAUXA fs
-------------------------------------
1023
=
I
AUXBP
I
OAUXB fs
1023
-------------------
=
I
AUXBN
I
OAUXB fs
-------------------------------------
1023
=
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