參數(shù)資料
型號(hào)： CL-PS7111-VC-A
廠商： CIRRUS LOGIC INC
元件分類： 外設(shè)及接口
英文描述： Low-Power System-on-a-Chip
中文描述： MULTIFUNCTION PERIPHERAL, PQFP208
封裝： VQFP-208
文件頁(yè)數(shù)： 80/105頁(yè)
文件大?。?/td> 1207K
代理商： CL-PS7111-VC-A
September 1997
79
PRELIMINARY DATA BOOK v2.0
ELECTRICAL SPECIFICATIONS
CL-PS7111
Low-Power System-on-a-Chip
Figure 6-3. Expansion and ROM Write Timing
NOTES:
1)
t
EXWRT
= MAX 70 ns at 18.432 MHz and 120 ns at 13.0 MHz for minimum wait states. This time can be
extended by integer multiples of the clock period (54 ns at 18.432 MHz and 77 ns at 13.0 MHz) by either
driving EXPRDY low and/or by programming a number of wait states. EXPRDY is sampled on the falling edge
of EXPCLK before the data transfer; if low at this point, the transfer is delayed by one clock period where
EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY but is shown for clarity.
2)
Consecutive writes with sequential access enabled are identical except that the sequential access wait state
field is used to determine the number of wait states. No idle cycles are inserted between sequential and non
sequential accesses. In addition, the write data set-up time to falling NMWE (T8) cannot be guaranteed to
be positive in this case; for I/O devices where this would cause a problem, the SQAEN bit should not be set.
EXPCLK
NMWE
NCS[5:0]
Consecutive expansion write cycles with minimum wait states
t
6
t
NCSWR
t
8
t
2
t
7
t
2
t
ADWR
t
5
A[27:0]
WORD
D[31:0]
NEXPRDY
BUS HELD
WRITE DATA
WRITE DATA
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