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參數(shù)資料
| 型號： | CL-PS7111-VC-A |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 外設及接口 |
| 英文描述： | Low-Power System-on-a-Chip |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP208 |
| 封裝： | VQFP-208 |
| 文件頁數(shù)： | 2/105頁 |
| 文件大?。?/td> | 1207K |
| 代理商： | CL-PS7111-VC-A |
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PRELIMINARY DATA BOOK v2.0
September 1997
2
OVERVIEW
CL-PS7111
Low-Power System-on-a-Chip
OVERVIEW
(cont.)
As shown in the system block diagram, simply add-
ing desired memory and peripherals to the highly
integrated CL-PS7111 completes a hand-held
organizer/PDA system board. All the interface logic
is integrated on-chip.
Memory Interface
There are two main external memory interfaces and
a DMA controller that fetches video display data for
the LCD controller from main DRAM memory.
The SRAM/ROM-style interface has programmable
wait-state timings and includes burst-mode capabil-
ity, with six chip selects decoding six 256-Mbyte
sections of addressable space. For maximum flexi-
bility, each bank can be specified to be 8, 16 or 32
bits wide to enable the use of low-cost memory in a
32-bit system. The system can have an 8-bit-wide
boot option to optimize memory size.
The programmable 16- or 32-bit-wide DRAM inter-
face allows direct connection of up to two banks of
DRAM, each bank containing up to 256 Mbytes. To
assure the lowest possible power consumption, the
CL-PS7111 supports self-refresh DRAMs, which
are placed in a low-power state by the device when
it enters low-power standby mode.
Serial Interface
For RS-232 serial communications, the CL-PS7111
includes two UARTs, both of which have two 16-
byte FIFOs for receive and transmit data. The
UARTs support bit rates of up to 115.2 kbps. An
IrDA SIR protocol encoder/decoder can be option-
ally switched into the Rx/Tx signals to/from one of
the UARTs to enable these signals to drive an infra-
red communication interface directly.
A full-duplex codec interface allows direct connec-
tion of a standard codec chip to the CL-PS7111,
allowing storage and playback of sound. A separate
synchronous serial interface supports two industry-
standard protocols (SPI
and Microwire
facing to standard devices such as an ADC, allow-
ing for peripheral expansion such as the use of a
digitizer pen.
) for inter-
FEATURES
(cont.)
Mbytes
— Each segment can be configured as 8, 16, or 32 bits
wide and support page-mode access
— Programmable access time for conventional
SRAM/ROM/flash memory
Support for up to two ultra-low-power CL-PS6700
PC Card controllers
2 Kbytes of on-chip SRAM for fast program
execution
On-chip boot ROM
Two synchronous serial interfaces
— Supports SPI
or Microwire
— Audio codec
27-bit general-purpose I/O
— Three 8-bit and one 3-bit GPIO port
— Supports scanning keyboard matrix
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1
2
-compatible
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1
SPI is a registered trademark of Motorola
Microwire is a registered trademark of National
Semiconductor
.
.
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Two UARTs
— Supports bit rates up to 115.2 kbps
— Contains two 16-byte FIFOs for Tx and Rx
— Supports modem control signals
SIR (slow — up to 115.2 kbps — infrared) encoder
— IrDA (Infrared Data Association) SIR protocol encoder
can be optionally switched into Tx and Rx signals of
UART 1 up to 115 kbps
DC-to-DC converter interface
— Provides two 96-kHz clock outputs with programmable
duty ratio (from 1-in-16 to 15-in-16)
LCD controller
— Interfaces directly to a single-scan panel monochrome
LCD
— Panel size is programmable from 16 to 1024 pixels in 16-
pixel increments
— Video frame size programmable up to 128 Kbytes
— Bits per pixel programmable from 1, 2, or 4
Timer and counters
3.3 V at 18.432 MHz and 2.7 V at 13 MHz
208-pin VQFP package
Evaluation kit available with BOM, schematics,
and design database
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