參數(shù)資料
型號(hào)： CL-PS7111-VC-A
廠商： CIRRUS LOGIC INC
元件分類(lèi)： 外設(shè)及接口
英文描述： Low-Power System-on-a-Chip
中文描述： MULTIFUNCTION PERIPHERAL, PQFP208
封裝： VQFP-208
文件頁(yè)數(shù)： 61/105頁(yè)
文件大?。?/td> 1207K
代理商： CL-PS7111-VC-A
PRELIMINARY DATA BOOK v2.0
September 1997
60
REGISTER DESCRIPTIONS
CL-PS7111
Low-Power System-on-a-Chip
5.13
Interrupt Mask Register 1 — INTMR1
The Interrupt Mask register 1 is a 32-bit read/write register used to selectively enable the 16 interrupt
sources within the CL-PS7111. The four shaded cells in the previous table are interrupts that generate a
fast interrupt request to the ARM7 processor (FIQ), causing a jump to the processor virtual address
0000.0001C. All other interrupts generate a standard interrupt request; this causes a jump to processor
virtual address 0000.00018. See
Table 3-12 on page 37
for the interrupt allocation. Setting the appropri-
ate bit in this register enables the corresponding interrupt. All bits are cleared by a system reset.
5.14
LCD Control Register — LCDCON
The LCD Control register is a 32-bit read/write that controls the size of the LCD screen and the operating
mode of the LCD controller operates in. Refer to
Section 3.10 on page 33
for more information on video
buffer mapping and the LCD controller.
NOTE:
The LCDCON register should only be reprogrammed when the LCD controller is disabled.
15
14
13
12
11
10
9
8
SSEOTI
UMSINT
URXINT
UTXINT
TINT
RTCMI
TC2OI
TC1OI
7
6
5
4
3
2
1
0
EINT3
EINT2
EINT1
CSINT
MCINT
WEINT
BLINT
EXTFIQ
31
30
29:25
24:19
18:13
12:0
GSMD
GSEN
AC prescale
Pixel prescale
Line length
Video buffer size
Bit
Description
31
GSMD:
Grayscale mode bit. Clearing this bit sets the controller to 2-bits per pixel (4 grayscales). Setting sets the con-
troller to 4-bits per pixel (15 grayscales).
30
GSEN:
Grayscale enable bit. Setting this bit enables grayscale output to the LCD. When this bit is cleared, each bit in
the video map directly corresponds to a pixel in the display.
29:25
AC Prescale:
The AC prescale field is a 5-bit number that sets LCD AC bias frequency. This frequency is the required
AC bias frequency for a given manufacturer’s LCD plate. This frequency is derived from the frequency of the line clock
(CL1). The ‘M’ signal toggles after n+1 counts of the line clock (CL1) where n is the number programmed into the AC
prescale field. This number must be chosen to match the manufacturer’s recommendation (normally 13), but must not
be exactly divisible by the number of lines in the display.
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