參數(shù)資料
型號: CL-PS7111-VC-A
廠商: CIRRUS LOGIC INC
元件分類: 外設(shè)及接口
英文描述: Low-Power System-on-a-Chip
中文描述: MULTIFUNCTION PERIPHERAL, PQFP208
封裝: VQFP-208
文件頁數(shù): 57/105頁
文件大?。?/td> 1207K
代理商: CL-PS7111-VC-A
PRELIMINARY DATA BOOK v2.0
September 1997
56
REGISTER DESCRIPTIONS
CL-PS7111
Low-Power System-on-a-Chip
1:0
Bus Width:
The effect of this field is dependent on the two BOOTBIT bits, which can be read in the SYSFLG register.
All bits in the Memory Configuration register are cleared by a system reset, and the state of the BOOTBIT bits is deter-
mined by Port E bits 0 and 1 on the CL-PS7111 during power-on reset. The state of PE1 and PE0 determine whether
the CL-PS7111 is going to boot from either 32-, 16-, or 8-bit-wide ROMs.
See
Chapter 6, “ELECTRICAL SPECIFICATIONS”
for more details on bus timing.
Bit
Description
(cont.)
Bit
BOOTBIT1
BOOTBIT0
Expansion Transfer
Mode
Port E Bits 1 and 0 During
NPOR Reset
1
0
0
0
0
0
32-bit-wide bus access
Low, Low
0
1
0
0
16-bit-wide bus access
Low, Low
1
0
0
0
8-bit-wide bus access
Low, Low
1
1
0
0
Reserved
Low, Low
0
0
0
1
8-bit-wide bus access
Low, High
0
1
0
1
Reserved
Low, High
1
0
0
1
32-bit-wide bus access
Low, High
1
1
0
1
16-bit-wide bus access
Low, High
0
0
1
0
16-bit-wide bus access
High, Low
0
1
1
0
32-bit-wide bus access
High, Low
1
0
1
0
Reserved
High, Low
1
1
1
0
8-bit-wide bus access
High, Low
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