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參數(shù)資料
| 型號： | CL-PS7111-VC-A |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Low-Power System-on-a-Chip |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP208 |
| 封裝： | VQFP-208 |
| 文件頁數(shù)： | 63/105頁 |
| 文件大?。?/td> | 1207K |
| 代理商： | CL-PS7111-VC-A |
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PRELIMINARY DATA BOOK v2.0
September 1997
62
REGISTER DESCRIPTIONS
CL-PS7111
Low-Power System-on-a-Chip
5.15
Timer Counter 1 Data Register — TC1D
The Timer Counter 1 Data register is a 16-bit read/write register that sets and reads data to TC1. Any
value written is decremented on the next rising edge of the clock.
5.16
Timer Counter 2 Data Register — TC2D
The Timer Counter 2 Data register is a 16-bit read/write register that sets and reads data to TC2. Any
value written is decremented on the next rising edge of the clock.
5.17
Realtime Clock Data Register —
RTCDR
The Realtime Clock Data register is a 32-bit read/write register that sets and reads the binary time in the
RTC. Any value written is incremented on the next rising edge of the 1-Hz clock. All bits in the Realtime
Clock Data register are only cleared by an active NPOR. This register is reset only by NPOR.
5.18
Realtime Clock Match Register — RTCMR
The Realtime Clock Match register is a 32-bit read/write register that sets and reads the binary match time
to RTC. Any value written is compared to the current binary time in the RTC, if they match it asserts the
RTCMI interrupt source. This register is reset only by NPOR.
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