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參數(shù)資料
| 型號(hào)： | BX80551PG3000FN |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 3000 MHz, MICROPROCESSOR, PBGA775 |
| 封裝： | FLIP CHIP, LGA-775 |
| 文件頁(yè)數(shù)： | 91/106頁(yè) |
| 文件大小： | 2713K |
| 代理商： | BX80551PG3000FN |
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Datasheet
85
Features
6
Features
6.1
Power-On Configuration Options
Several configuration options can be configured by hardware. The Intel Pentium D processor
samples the hardware configuration at reset, on the active-to-inactive transition of RESET#. For
specifications on these options, refer to Table 6-1.
The sampled information configures the processor for subsequent operation. These configuration
options cannot be changed except by another reset. All resets reconfigure the processor; for reset
purposes, the processor does not distinguish between a "warm" reset and a "power-on" reset.
6.2
Clock Control and Low Power States
The processor allows the use of AutoHALT and Stop-Grant states to reduce power consumption by
stopping the clock to internal sections of the processor, depending on each particular state. See
Figure 6-1 for a visual representation of the processor low power states.
The Pentium D processor includes support for the Enhanced HALT powerdown state. Refer to
Figure 6-1 and the following sections.
Table 6-1. Power-On Configuration Option Signals
Configuration Option
Signal1, 2
NOTES:
1.
Asserting this signal during RESET# will select the corresponding option.
2.
Address signals not identified in this table as configuration options should not be asserted during RESET#.
Output tristate
SMI#
Execute BIST
INIT#
In Order Queue pipelining (set IOQ depth to 1)
A7#
Disable MCERR# observation
A9#
Disable BINIT# observation
A10#
APIC Cluster ID (0-3)
A[12:11]#
Disable bus parking
A15#
Single Logical Processor Mode3
3.
This mode is not tested.
A31#
Symmetric agent arbitration ID
BR0#
RESERVED
A[6:3]#, A8#, A[14:13]#, A[16:30]#, A[32:35]#
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