參數(shù)資料
型號(hào)： AD9925BBCZRL
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： CCD Signal Processor with Vertical Driver and Precision Timing Generator
中文描述： SPECIALTY CONSUMER CIRCUIT, PBGA96
封裝： 8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96
文件頁(yè)數(shù)： 43/96頁(yè)
文件大小： 1447K
代理商： AD9925BBCZRL
AD9925
FG_TRIG OPERATION
The AD9925 contains an additional signal that may be used in
conjunction with shutter operation or general system operation.
The FG_TRIG signal is an internally generated pulse that can be
output on the VSUB or SYNC pins for system use or combined
with the VSUB registers to create a four-toggle VSUB signal.
Rev. A | Page 43 of 96
The FG_TRIG signal is generated using the start polarity and
first and second toggle position registers, programmable with
line and pixel resolution. The field placement of the FG_TRIG
pulse is matched to the field count specified by the MODE reg-
ister operation. The FG_TRIGEN register contains a 3-bit value
to specify which field count will contain the FG_TRIG pulse.
Figure 53 shows how the FG_TRIG pulse is generated using
these registers.
After the FG_TRIG signal is specified, it is enabled using Bit 3
of the FG_TRIGEN register. By default, the FG_TRIG will be
mapped to the SYNC output, as long as the SYNC pin is config-
ured as an output (SYNCENABLE = 1). Alternatively, the
FG_TRIG pulse may be mapped to the VSUB output by
writing a 1 to the SHUT_EXTRA Register Bit 3.
One final application for the FG_TRIG signal is to combine it
with the existing VSUB signal to generate additional toggle
positions. By setting the SHUT_EXTRA Bit 8 to a 1, the VSUB
toggles and FG_TRIG toggles are XOR’d together and sent to the
VSUB output. Figure 52 and Figure 54 show this application in
more detail.
0
1
0
1
2:1
FG_TRIG
INTERNAL
VSUB
INTERNAL
VSUB
OUTPUT
SHUT_EXTRA[8]
SHUT_EXTRA[3]
XOR
2:1
0
Figure 52. Combining the Internal FG_TRIG and Internal VSUB Signals
Table 21. FG_TRIG Operation Registers
Register
Address
SYNCENABLE
0x12
VSUBON
0x68
scription
De
1: Configures SYNC Pin as an Output. By default, the FG_TRIG signal outputs on the SYNC pin.
Controls VSUB O
with VSUB signa
l.
Selects Whether FG_TRIG Sign
[2:0] Set to 0.
[3] Set = 1 to send FG_TRIG signal to VSUB pin.
[7:4] Set to 0.
[8] Set = 1 to com
G and VSUB signals.
FG_TRIG Enable.
[2:0] Selects field
[3] Set = 1 to enab
le FG_TRIG sign
al output.
FG_TRIG Start Polarity.
FG_TRIG First Toggle Position, Line Location.
FG_TRIG First Toggle Position, Pixel Location.
FG_TRIG Second Toggle Position, Line Location.
FG_TRIG Second Toggle Position, Pixel Location.
Bit Width
[0]
[12:0]
n Position and
Polarity. When SHUT_Extra [8] = 1, FG_TRIG toggles are combined
SHUT_EXTRA
0xE7
[8:0]
bine FG_TRI
al Is Used with VSUB.
FG_TRIGEN
0xEB
[3:0]
count for pulse
d counter).
(based on mode fiel
FG_TRIGPOL
FG_TRIGLINE1
FG_TRIGPIX1
FG_TRIGLINE2
FG_TRIGPIX2
0xF2
0xF3
0xF4
0xF5
0xF6
[0]
[11:0]
[12:0]
[11:0]
[12:0]
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