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參數(shù)資料
| 型號(hào)： | AD9925BBCZRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | CCD Signal Processor with Vertical Driver and Precision Timing Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA96 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, CSBGA-96 |
| 文件頁數(shù)： | 29/96頁 |
| 文件大小： | 1447K |
| 代理商： | AD9925BBCZRL |
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AD9925
Complete Field: Combining Vertical Sequences
After the vertical sequences have been created, they are combined
to create different readout fields. A field consists of up to seven
different regions, and within each region, a different vertic
sequence can be selected. Figure 37 shows how the sequence
change positions (SCP) designate the line boundary for each
region, and how the VSEQSEL registers select which vertical
Rev. A | Page 29 of 96
al
sequence is used during each region. Registers to control the
XSG outputs are also included in the field registers.
Table 15 summarizes the registers used to create the different
fields. Up to six different fields can be preprogrammed using
the field registers.
The VEQSEL registers, one for each region, select which of the
10 vertical sequences will be active during each region. The
SWEEP registers are used to enable the sweep mode during any
region. The MULTI registers are used to enable the multiplier
mode during any region. The SCP registers create the line
is specified in the vertical sequence registers, but
he HDLAST register specifies the number of pixels in the last
ne of the field. Note that the 13
th
bit (MSB) of the last line
length is located in a separate register. During the sensor gate
(SG) line, the VPATSECOND register is used to add a second
vertical pattern group to the XV outputs.
The SGMASK register is used to enable or disable each individual
VSG output. There is a single bit for each XSG output, setting
the bit high will mask the output and setting it low will enable
the output. The SGPAT register assigns one of the four different
SG patterns to each VSG output. The individual SG patterns are
created separately using the SG pattern registers. The SGLINE1
register specifies which line in the field will contain the XSG
outputs. The optional SGLINE2 register allows the same SG pulses
to be repeated on a different line.
Table 15. Field Registers
Register
VSEQSEL
SWEEP
MULTI
SCP
VDLEN
HDLAST
Length Range
4 b
1 b
1 b
12 b
12 b
13 b
Description
Selected Vertical Sequence for Each Region in the Field.
Enables Sweep Mode for Each Region, Whe
Enabl
ultiplier Mode for Each Region, When Set High.
es M
Sequence Change Position for Each Region.
Total Number of Lines in Each Field.
Length in Pixels of the Last HD Line in
boundaries for each region. The VDLEN register specifies the
total number of lines in the field. The total number of pixels per
line (HDLEN)
t
li
0 to 9 V Sequence Number
High/L
ow
High/Low
0 to 4095 Line Number
0 to 4095 Number of Lines
0 to 8191 Num
n Set High.
Each Field. The13
th
bit (MSB) is located
in a separate register to maintain compatibility with the AD9995.
Selected Vertical Pattern Group for Second Pattern Applied During SG Line.
ber of Pixels
VPATSECOND 4 b
0 to 9 Vertical Pattern Group
Number
High/Low, Each XSG
SGMASK
6 b
Set High to Mask Each Individual XSG Output.
XSG1 [0], XSG2 [1], XSG3 [2], XSG4 [3], XSG5 [4], XSG6 [5].
Selects the SG Pattern Number for Each XSG Output.
XSG1 [1:0], XSG2 [3:2], XSG3 [5:4], XSG4 [7:6], XSG5 [9:8], XSG6 [11:10].
Selects the Line in the Field Where the SG Signals Are Active.
Selects a Second Line in the Field to Repeat the SG Signals.
SGPATSEL
12 b
0 to 3 Pattern Number, Each XSG
SGLINE1
SGLINE2
12 b
12 b
0 to 4095 Line Number
0 to 4095 Line Number
VD
REGION 0
FIELD SETTINGS:
1. SEQUENCE CHANGE POSITIONS (SCP1 TO SCP6) DEFINE EACH OF THE SEVEN REGIONS IN THE FIELD.
2. VSEQSEL0 TO VSEQSEL6 SELECTS THE DESIRED VERTICAL SEQUENCE
3. SGLINE1 REGISTER SELECTS WHICH HD LINE IN THE FIELD WILL CONTAIN THE SENSOR GATE PULSE(S).
XV1 TO XV6
HD
SCP 1
SCP 2
VSEQSEL0
VSEQSEL1
SCP 3
VSEQSEL2
SCP 4
VSEQSEL3
SCP 5
VSEQSEL4
SCP 6
VSEQSEL5
VSEQSEL6
REGION 1
REGION 2
REGION 3
REGION 4
REGION 5
REGION 6
XSG
SGLINE
0
(0–9) FOR EACH REGION.
Figure 37. Complete Field Is Divided into Regions
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