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參數(shù)資料
| 型號(hào)： | AD9887AKSZ-140 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/52頁 |
| 文件大小： | 0K |
| 描述： | IC INTRFACE ANALOG/DVI 160-MQFP |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 應(yīng)用： | 圖形卡，VGA 接口 |
| 接口： | 模擬和數(shù)字 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 封裝/外殼： | 160-BQFP |
| 供應(yīng)商設(shè)備封裝： | 160-MQFP（28x28） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
| 產(chǎn)品目錄頁面： | 788 (CN2011-ZH PDF) |
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AD9887A
Rev. B | Page 27 of 52
THEORY OF OPERATION—INTERFACE DETECTION
ACTIVE INTERFACE DETECTION AND SELECTION
For interface detection in the AD9887A, the system should
determine the correct interface and set the chip appropriately
through the serial bus. An external circuit should be used to
determine if the digital interface is active. A typical schematic
for this detection function is shown in Figure 28.
It is recommended that the system implement the interface
selection criteria, as described in Table 8. Because the digital
interface clock detect bit (0x11[4]) has been unreliable in some
applications, it is recommended that the active interface override
bit (0x12[7]) be set to 1. This allows the system to select the
interface through the serial bus register active interface select
(AIS) bit (0x12[6]). This selection should be based on the analog
interface detect obtained by OR’ing Bit 7, Bit 6, and Bit 5 of
Register 0x11 and on the digital interface detect obtained through
the external circuitry shown in Figure 28. When both interfaces
are active, priority must be determined by the system and the
appropriate interface must be selected via the AIS bit.
+
–
9
10
1
2
5
6
8
10k
11k
10k
0.1F
CLK+
CLK–
1.0F
10k
CLK
ACTIVE
3.3V
1 = DVI CLOCK ACTIVE
0 = DVI CLOCK NOT ACTIVE
HIGH SPEED
COMPARATOR
LT1715
02
83
8-
0
43
Figure 28. External Digital Interface Clock Detect Circuit
HOT-PLUG DETECT
In some HDCP-enabled applications it may be desirable to be
able to switch between the analog and DVI interfaces without
having an DVI plug/unplug event. In these applications, the circuit
in Figure 29 should be used for the hot-plug detect connection.
The FET switch should be controlled by the system-level software
to force an HPD event whenever the selected interface is switched
from the analog input to the DVI input.
HPD
+5V
14
15
HPD CONTROL BIT
02
83
8-
0
46
1k
Figure 29. Manual Hot-Plug Detect
POWER MANAGEMENT
The AD9887A is a dual-interface device with shared outputs.
Because only one interface can be used at a time, the unused
interface should be powered down. When the analog interface is
being used, most of the digital interface circuitry can be powered
down and vice versa. This helps to minimize the total power
dissipation of the AD9887A. In addition, if neither interface has
activity on it, both interfaces should be powered down.
The correct power-down state is set by selecting an interface to
be active through the serial bus when either or both interfaces
are active, and by setting the power-down register bit (0x12[0])
to 0 when neither interface has activity on it. In a given power
mode, not all circuitry in the inactive interface is powered down
completely. When the digital interface is active, Hsync detect
circuitry is not powered down. SOG, outputs, and the band gap
reference are powered up if either interface is active. The serial
bus stays active even if the entire chip is powered down.
Table 8. Interface Selection and Power-Down Controls
Power-
Down
Active Interface
Override
(0x12[7])
Analog Interface
Detect (0x11[7],
0x11[6], or 0x11[5])
Digital Interface
Detect (from
External Circuit)
AIS
Active
Interface
Description
1
X
0
Analog
Force the analog interface active.
1
X
1
Digital
Force the digital interface active.
0
X
0
X
None
Neither interface is detected. Both
interfaces are powered down and
the SCDT pin is set to Logic 0.
1
0
1
Digital
The digital interface is detected.
Power down the analog interface.
1
0
Analog
The analog interface is detected.
Power down the digital interface.
1
0
Analog
Both interfaces are detected. The
analog interface has priority.
1
Digital
Both interfaces are detected. The
digital interface has priority.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9887AKSZ-1401 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Display |
| AD9887AKSZ-170 | 功能描述:IC INTRFACE ANALOG/DVI 160-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9887AKSZ-170 | 制造商:Analog Devices 功能描述:IC DUAL DISPLAY INTERFACE |
| AD9887AKSZ-1701 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Display |
| AD9887APCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays |
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