
TM1300 Data Book
Philips Semiconductors
A-146
PRODUCT SPECIFICATION
prefd
prefetch with displacement
SYNTAX
[ IF r
guard ] prefd(d) rsrc1
FUNCTION
if r
guard then {
cache_block_mask = ~(cache_block_size - 1)
data_cache <- mem[(rsrc1 + d) & cache_block_mask]
}
ATTRIBUTES
Function unit
dmemspec
Operation code
209
Number of operands
1
Modier
7 bits
Modier range
–256..252 by 4
Latency
-
Issue slots
5
DESCRIPTION
The prefd operation loads the one full cache block size of memory value from the address computed by ((rsrc1+d) &
cache_block_mask) and stores the data into the data cache. This operation is not guaranteed to be executed. The
prefetch unit will not execute this operation when the data to be prefetched is already in the data cache. A prefd
operation will not be executed when the cache is already occupied with 2 cache misses, when the operation is issued.
The prefd operation optionally takes a guard, specied in rguard. If a guard is present, its LSB controls the execution
of the prefetch operation. If the LSB of rguard is 1, prefetch operation is executed; otherwise, it is not executed..
EXAMPLES
NOTE: This operation is supported only in TM1000, TM1100 and TM1300 and it is not
guaranteed to be available in future generations of this product.
Initial Values
Operation
Result
r10 = 0xabcd,
cache_block_size = 0x40
prefd(0xd) r10
Loads a cache line for the address space from
0xabc0 to 0x0xabff from the main memory. If the data
is already in the cache, the operation is not executed.
r10 = 0xabcd, r11 = 0,
cache_block_size = 0x40
IF r11 prefd(0xd) r10
since guard is false, prefd operation is not executed
r10 = 0xabff, r11 = 1,
cache_block_size = 0x40
IF r11 prefd(ox1) r10
Loads a cache line for the address space from
0xac00 to 0x0xac3f from the main memory. If the
data is already in the cache, the operation is not exe-
cuted.
SEE ALSO
pref16x pref32x prefr
allocd allocr allocx