
PRODUCT SPECIFICATION
13-1
System Boot
Chapter 13
by Gert Slavenburg, Bob Bradfield, and Hani Salloum
13.1
NEW IN TM1300
A new bit in the boot EEPROM allows an internal
PCI_CLK clock source for low-cost standalone systems
13.2
TM1300 BOOT SEQUENCE
OVERVIEW
Before a TM1300 system can begin operating, the main-
memory interface (MMI) registers and on-chip clock ratio
register must be configured. Since the DSPCPU cannot
begin operating until after these registers and circuits are
initialized, the DSPCPU cannot be relied on to initialize
these resources. Consequently, TM1300 needs an inde-
pendent bootstrap facility for low-level initialization.
TM1300 implements low-level system initialization by
combining a small block of on-chip system boot logic with
a single external serial boot EEPROM connected to the
I2C interface. See Figure 13-1. Serial EEPROMs with an
I2C interface are slow but have the advantages of being
space-efficient and inexpensive. The amount of informa-
tion needed for initial system boot is small, so speed is
not a concern.
The TM1300 system boot block performs differently for
each of two major types of TM1300 system, distin-
guished by host-assisted and autonomous bootstrap-
ping. The most significant bit of the tenth byte in the ex-
ternal EEPROM determines the system boot procedure
and must match the system configuration.
In host-assisted bootstrapping, a TM1300 device is inte-
grated into a system where some other processor serves
as the host. For example, a TM1300 chip might be part
of a PCI card in a standard personal computer (PC). In
this case, the TM1300 system boot only needs to load
enough information from the serial EEPROM to config-
ure the on-chip timing circuits and MMI; the host proces-
sor can perform all other TM1300 setup chores.
In the second type of system, autonomous bootstrapping
takes place. In this configuration, a TM1300 device
serves as the host (main) processor; consequently, the
TM1300 system boot must perform more work. In addi-
tion to configuring on-chip timing and the MMI, the sys-
tem boot must set the base addresses of the main mem-
ory and MMIO address apertures and load into main
memory a level 1 bootstrap program for the DSPCPU.
Only the first 10 bytes of the serial EEPROM are needed
when TM1300 is not the host PCI processor; thus, such
systems can use a very low-cost 128-byte EEPROM de-
vice. When TM1300 serves as the system’s host proces-
sor, the boot logic permits almost 2 KB of storage for the
level 1 bootstrap DSPCPU program in a single eight-pin
EEPROM device.
Figure 13-1. The system boot logic uses the I2C in-
terface to access a serial EEPROM that contains
main-memory and system timing information.
4.7K
TM1300
System Boot
Block
I2C Interface
Serial
EEPROM
SCL
SDA
4.7K
Vdd
Table 13-1. System Boot Features
Characteristic
Comments
Boot Congurations
Supported
Host assisted, e.g., TM1300 is a
PCI slave in a standard PC.
Autonomous, e.g., TM1300 is the
host PCI processor.
ROM Device Types
Supported
Single standard I2C serial
EEPROMs from 128 bytes to 2KB in
size.
EEPROMs connect via the TM1300
built-in 2-wire I2C interface.
The use of EEPROMs with hard-
ware Write Protect (WP) is recom-
mended. A jumper on WP allows
user control over in-system repro-
gramming using the I2C interface.
The EEPROM must respond to I2C
device address 1010.
ROM device
examples
Atmel 24C01A (128 bytes, WP)
Atmel 24C08 (1KB, WP)
Atmel 24C16 (2KB, WP).
ROM size
From 128 bytes to 2 KB (one
device) for initial program load.