參數(shù)資料
型號： 22247J
英文描述： 3.3V EconoReset
中文描述： FBGA封裝用戶指南。版本4.2
文件頁數(shù)： 83/97頁
文件大?。?/td> 2624K
代理商： 22247J
FBGA User’s Guide
82
Version 4.2, November 1, 2002
5
Ψ
JT
= (T
Jss
- T
Tss
)/P
H
(4)
where
Ψ
JT
= thermal characterization parameter from device junction to the top center of the
package surface(
°
C/W)
T
Jss
= the junction temperature at steady-state.
T
Tss
= the package (top surface) temperature, at steady-state, measured by the thermocouple,
infrared sensor, or fluoroptic sensor.
The relationship between the junction-to-ambient thermal resistance,
θ
JA
, and the junction-to-top center of
package thermal characterization parameter,
Ψ
JT
, is described by equation 5:
θ
JA
=
Ψ
JT
+
Ψ
TA
(5)
where
Ψ
TA
= thermal characterization parameter from top surface of the package-to-air (
°
C/W)
The package-to-air thermal characterization parameter,
Ψ
TA
, is based on the steady-state ambient air
temperature as shown here:
Ψ
TA
= (T
Tss
- T
Ass
)/P
H
(6)
The thermal characterization parameters,
Ψ
JT
and
Ψ
TA
, have the units
°
C/W but are mathematical constructs
rather than thermal resistances because not all of the heating power flows through the exposed case surface.
It is not necessary to report
Ψ
TA
because it can be determined from the relationship between
θ
JA
and
Ψ
JT
.
Also,
Ψ
TA
is very dependent on the application-specific environment.
Conclusion
This memo has attempted to educate and inform package, process, and product engineers
in the correct use of temperature measurements on the external surface of the package to
determine junction temperature. If we educate our customers, system level thermal analysis
will be more accurate, allowing a larger application range for our products, especially in
critical situations. Because the measurement is relatively new, we are in the process of
generating
Ψ
J-T
values for all AMD surface mount plastic packages. If a value is needed for a
particular product, please contact the Package Characterization Group in MSD
Engineering.
References
1. "Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Device), EIA/ JESD51
Standard, Electronic Industries Association, 1995
2. "Integrated Circuit Thermal Measurement Method - Electrical Test Method (Single Semiconductor Device),
EIA/JESD 51-1 Standard, Electronic Industries Association, 1995
3. "Integrated Circuit Thermal Test Method Environmenatl Conditions - Natural Convection (Still Air), EIA/JESD 51-2
Standard, Electronic Industries Association, 1995
4. "Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages," EIA/JESD 51-3 Standard,
Electronic Industries Association, 1996
5. "Thermal Test Chip Guideline (Wire Bond Type Chip)," EIA/JESD 51-4 Standard, Electronic Industries Association,
1996
6. “Extension of Thermal Test Board Standards for Packages with Direct Attach Mechanisims” EIA/JESD 51-5,
Electronic Industries Association, 1999
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