參數(shù)資料
型號： XRT82L24IV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述： DATACOM, PCM TRANSCEIVER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
文件頁數(shù)： 4/43頁
文件大小： 285K
代理商： XRT82L24IV
XRT82L24
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.2.3
á
I
TABLE OF CONTENTS
GENERAL DESCRIPTION ................................................................................................. 1
F
EATURES
.................................................................................................................................................... 1
A
PPLICATIONS
.............................................................................................................................................. 1
Figure 1. Block Diagram of the XRT82L24 E1 LIU (Host Mode) ........................................................... 1
Figure 2. Block Diagram of the XRT82L24 T1/E1/J LIU (Hardware Mode) ........................................... 2
Figure 3. Pin Out of the XRT82L24 .......................................................................................................... 3
TABLE OF CONTENTS ....................................................................................................... I
PIN DESCRIPTION ............................................................................................................. 4
R
ECEIVER
S
ECTIONS
.................................................................................................................................... 4
T
RANSMITTER
S
ECTIONS
.............................................................................................................................. 4
M
ICROPROCESSOR
I
NTERFACE
...................................................................................................................... 5
C
LOCKS
....................................................................................................................................................... 7
J
ITTER
A
TTENUATOR
.................................................................................................................................... 7
C
ONTROL
..................................................................................................................................................... 7
P
OWER
S
UPPLIES
AND
G
ROUNDS
................................................................................................................. 8
SYSTEM-FUNCTIONAL DESCRIPTION ......................................................................... 10
R
ECEIVER
.................................................................................................................................................. 10
J
ITTER
A
TTENUATOR
.................................................................................................................................. 10
HDB3/AMI D
ECODER
................................................................................................................................. 10
R
ECEIVER
L
OSS
OF
S
IGNAL
(LOS) .............................................................................................................. 10
C
ONDITIONS
FOR
DECLARING
AND
CLEARING
LOS
IN
THE
E1 M
ODE
. ............................................................ 11
R
ECEIVE
D
ATA
M
UTING
.............................................................................................................................. 11
LOOP-BACK MODES .............................................................................................................................. 11
R
EMOTE
L
OOP
-B
ACK
(RLOOP) MODE ...................................................................................................... 11
D
IGITAL
L
OCAL
LOOP
-B
ACK
(DLOOP)
MODE
............................................................................................... 11
A
NALOG
LOCAL
L
OOP
-B
ACK
(ALOOP)
MODE
.............................................................................................. 11
Figure 4. Remote Loop-Back with jitter attenuator selected in receive path .................................... 12
Figure 5. Remote Loop-Back with jitter attenuator selected in transmit path .................................. 12
Figure 6. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected & in re-
ceive path) .............................................................................................................................. 13
Figure 7. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected & in
transmit path) ......................................................................................................................... 13
Figure 8. Analog Local Loop-Back signal flow Jitter Attenuator selected & in Receive path ........ 14
Figure 9. Analog Local Loop-Back signal flow Jitter Attenuator selected & in transmit path ........ 14
R
ESET
O
PERATION
..................................................................................................................................... 14
R
ECEIVER
M
ODES
OF
O
PERATION
............................................................................................................... 14
R
ECEIVE
D
ATA
I
NVERT
M
ODE
..................................................................................................................... 14
Figure 10. Data changes on rising edge of Clk and Data is sampled on falling edge ..................... 15
Figure 11. Data changes on falling edge of Clk and is sampled on rising edge .............................. 15
T
RANSMIT
C
LOCK
S
AMPLING
E
DGE
............................................................................................................. 15
SINGLE
RAIL
, D
UAL
RAIL
.............................................................................................................................. 15
T
RANSMIT
A
LL
O
NES
(TAOS) ..................................................................................................................... 15
HDB3/AMI E
NCODER
................................................................................................................................. 15
T
RANSMIT
P
ULSE
S
HAPER
.......................................................................................................................... 16
D
RIVER
M
ONITOR
....................................................................................................................................... 16
TRANSMIT
OFF
CONTROL
............................................................................................................................ 16
I
NTERFACING
THE
XRT 82L24
TO
THE
L
INE
................................................................................................ 16
Figure 12. XRT 82L24 Channel 1in an E1 unbalanced 75 W application ........................................... 16
Figure 13. XRT 82L24 Channel 1 - E1 120 W balanced application ................................................... 17
T
ABLE
1: E1 R
ECEIVER
E
LECTRICAL
C
HARACTERISTICS
............................................................................. 18
T
ABLE
2: E1 T
RANSMITTER
E
LECTRICAL
C
HARACTERISTICS
....................................................................... 19
T
ABLE
3: T
RANSMIT
P
ULSE
M
ASK
S
PECIFICATION
...................................................................................... 19
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PDF描述
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XRT82L34 Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）)
XRT82L38 Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）)
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XRT82L34IV 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC
XRT83D10 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
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XRT83D10IW 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83D10IW-F 功能描述:外圍驅(qū)動器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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