參數(shù)資料
型號(hào)： XRT82L24IV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述： DATACOM, PCM TRANSCEIVER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
文件頁(yè)數(shù)： 30/43頁(yè)
文件大?。?/td> 285K
代理商： XRT82L24IV
XRT82L24
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.2.3
á
28
T
ABLE
11: C
HANNEL
S
TATUS
R
EGISTER
C
HANNEL
S
TATUS
R
EGISTER
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
0: 0010
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
1: 0101
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
2: 1000
P
ARALLEL
P
ORT
A
DDRESS
C
HANNEL
3: 1011
B
IT
N
O
.
S
YMBOL
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
7
DMOn
Driver Monitor Output:
This bit is set to a "1" to indicate current DMO is detected. Any change in the
state of this bit causes an interrupt to be generated. Reading this register bit
does not clear the DMO bit.
R
0
6
LOSn
Loss of Signal:
This bit is set to a "1" to indicate current LOS condition is detected. Any
change in the state of this bit causes an interrupt to be generated. Reading
this register bit does not clear the LOS bit.
R
0
5
LCVn
Line Code Violation:
This bit is set to a "1" to indicate current LCV condition is detected. Any
change in the state of this bit causes an interrupt to be generated. Reading
this register bit does not clear the LCV bit.
R
0
4
TCKLn
Transmit Clock Loss:
This bit is set to a "1" to indicate current TxClk clock loss is detected. Any
change in the state of this bit causes an interrupt to be generated. Reading
this register bit does not clear the TCKL bit.
R
0
3
DMOnIS
Driver Monitor Output:
This bit is set to a "1" every time the state of DMO status changes since last
read. This bit is cleared by a read operation.
RUR
0
2
LOSnIS
Latched- Loss of signal:
This bit is set to a "1" every time the state of LOS changes since last read.
This bit is cleared by a read operation.
RUR
0
1
LCVnIS
Latched- Line Code Violation:
This bit is set to a "1" every time the state of LCV changes since last read.
This bit is cleared by a read operation.
RUR
0
0
TCLKnIS
Latched-Transmit Clock Loss.
This bit is set to a "1" every time the state of TCKL changes since last read.
This bit is cleared by a read operation.
RUR
0
N
OTE
: n = channel number 0 to 3.
N
OTE
:
Register Type Abrbreviation:
R
= Read Only,
R/W
= Read or Write,
RUR
= Reset Upon Read
相關(guān)PDF資料
PDF描述
XRT82L24 Quad E1 Line Transceiver with Clock Recovery and Jitter Attenuator(四E1線收發(fā)器（帶時(shí)鐘恢復(fù)和振動(dòng)衰減器）)
XRT82L34 Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
XRT82L38 Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
XRT83D10 SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
XRT83D10IW SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT82L34IV 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC
XRT83D10 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT
XRT83D10ES 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1 CHT1/E1LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83D10IW 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83D10IW-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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