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參數(shù)資料
| 型號(hào)： | XRT82L24IV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 26/43頁 |
| 文件大小： | 285K |
| 代理商： | XRT82L24IV |
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XRT82L24
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.2.3
á
24
T
ABLE
7: M
ICROPROCESSOR
INTERFACE
SIGNAL
D[7:0]
Data Input (Output): 8 bits bi-directional data bus for register access.
ADD[3:0]
Address Input: 4 bit address to select internal register location.
PTS1
PTS2
Processor Type Select:
PCLK
Process Clock Input: Input clock for synchronous microprocessor operation. Maximum clock speed is
33MHz. This pin is internally pulled down for asynchronous microprocessor operation if no clock is
present.
ALE_AS
Address Latch Input (Address Strobe): With Intel bus timing, the address inputs are latched into the inter-
nal register on the falling edge of ALE. When configured in Motorola bus timing, the address inputs are
latched into the internal register on the falling edge of AS.
CS
Chip Select Input: This signal must be low in order to access the parallel port.
RD_DS
Read Input (Data Strobe): With Intel bus timing, a low pulse on RD selects a read operation when CS pin
is low. When configured in Motorola bus timing, a low pulse on DS indicates a read or write operation
when CS pin is low.
WR_R/W
Write Input (Read/Write): With Intel bus timing, a low pulse on WR selects a write operation when CS pin
is low. When configured in Motorola bus timing, a high pulse on R/W selects a read operation and a low
pulse on R/W selects a write operation when CS pin is low.
RDY_DTACK Ready Output (Data Transfer Acknowledge Output): With Intel bus timing, RDY is asserted high to indicate
the device has completed a read or write operation. When configured in Motorola bus timing, DTACK is
asserted low to indicate the device has completed a read or write operation.
INT
Interrupt Output: This pin is asserted low to indicate an interrupt caused by an alarm condition in the
device status registers. The activation of this pin can be blocked by the interrupt status register bit.
8HC11,8081,80C188 (async.)
Motorola 68K (async.)
Intel x86 (sync.)
Intel i906,Motorola 860 (sync.)
PTS1
0
1
0
1
PTS2
0
0
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT82L24 | Quad E1 Line Transceiver with Clock Recovery and Jitter Attenuator(四E1線收發(fā)器（帶時(shí)鐘恢復(fù)和振動(dòng)衰減器）) |
| XRT82L34 | Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）) |
| XRT82L38 | Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）) |
| XRT83D10 | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10IW | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT82L34IV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| XRT83D10 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10ES | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1 CHT1/E1LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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