- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376463 > XRT82L24IV (EXAR CORP) QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR PDF資料下載
參數(shù)資料
| 型號： | XRT82L24IV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 28/43頁 |
| 文件大?。?/td> | 285K |
| 代理商： | XRT82L24IV |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
XRT82L24
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.2.3
á
26
T
ABLE
9: C
OMMAND
C
ONTROL
R
EGISTER
0
C
OMMAND
C
ONTROL
R
EGISTER
0
P
ARALLEL
P
ORT
A
DDRESS
: 0000
B
IT
N
O
.
N
AME
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
7
SR/DR
Single/Dual Rail:
Writing a "1" to this bit selects transmit and receive data format in
single-rail mode. In this mode, HDB3/B8ZS/AMI encoder and
decoder are available.
Writing a "0" selects dual-rail mode.
R/W
0
6
RZData
RZ Data:
Writing a “1” to this bit selects receive data to pass to the output
after the slicers without re-timing. In this mode, PLL clock recov-
ery, jitter attenuator, decoder and remote loop-back functions are
disabled.
R/W
0
5
RCLKE
RxClk Clock Edge:
Writing a "1" to this bit selects receive output data to be updated
on positive edge of RxClk.
Writing a "0" to this bit selects the negative edge of RxClk.
R/W
0
4
TCLKE
TxClk Clock Edge:
Writing a "1" to this bit selects positive edge of TxClk to sample
input data.
Write "0" to select negative edge.
R/W
0
3
DATAP
DATA Polarity:
Writing a "0" to this bit selects transmit input and receive output
data to be active-high.
Write "1" to select active-low.
R/W
0
2
CODES
Coding/Decoding Select:
This bit is used in conjunction with SR/DR bit 1. If SR/DR is "1",
writing a "0" to this bit selects HDB3 coding. Writing a "1" to this
bit position selects AMI code.
R/W
0
1
GIE
Global Interrupt Enable:
Writing a "0" to this bit globally disables interrupt generation
caused by any alarm generated within the line interface. Write a
"1" to enable interrupt generation.
R/W
0
0
SRESET
Software Reset:
Writing a "1" to this bit longer than 10μs initiates a device reset
through the microprocessor interface. All internal circuits are
placed in the reset state with this bit set to a "1" except the micro-
processor register bits.
R/W
0
N
OTE
:
Register Type Abrbreviation:
R
= Read Only,
R/W
= Read or Write,
RUR
= Reset Upon Read
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT82L24 | Quad E1 Line Transceiver with Clock Recovery and Jitter Attenuator(四E1線收發(fā)器（帶時鐘恢復(fù)和振動衰減器）) |
| XRT82L34 | Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）) |
| XRT82L38 | Octal E1/T1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(八 T1/E1/J1線收發(fā)器（帶時鐘恢復(fù)和振蕩衰減器）) |
| XRT83D10 | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10IW | SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT82L34IV | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interface IC |
| XRT83D10 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE CHANNEL DS1/CEPT LINE INTERFACE UNIT |
| XRT83D10ES | 功能描述:外圍驅(qū)動器與原件 - PCI 1 CHT1/E1LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83D10IW-F | 功能描述:外圍驅(qū)動器與原件 - PCI Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。