參數(shù)資料
型號: XE8000EV108
廠商: Semtech
文件頁數(shù): 40/143頁
文件大小: 0K
描述: EVAL BOARD FOR XE8806/XE8807
標準包裝: 1
類型: MCU
適用于相關(guān)產(chǎn)品: XE88LC06AMI026
所含物品: 完全組裝的評估板
產(chǎn)品目錄頁面: 585 (CN2011-ZH PDF)
Semtech 2006
www.semtech.com
18-3
XE8806A/XE8807A
18.5 VLD operation
The VLD is controlled by VldRange, VldTune and VldEn. VldRange selects the voltage range to be detected,
while VldTune is used to fine-tune this voltage level in 8 steps. VldEn is used to enable (disable) the VLD with a
1(0) value respectively. Disabled, the block will dissipate no power.
symbol
description
min
typ
max
unit
comments
trimming values:
Note 1
VldRange
VldTune
1.53
0
000
1.44
0
001
1.36
0
010
1.29
0
011
1.22
0
100
1.16
0
101
1.11
0
110
1.06
0
111
3.06
1
000
2.88
1
001
2.72
1
010
2.57
1
011
2.44
1
100
2.33
1
101
2.22
1
110
Vth
Threshold voltage
2.13
V
1
111
TEOM
duration of
measurement
2.0
2.5
ms
Note 2
TPW
Minimum pulse width
detected
875
1350
us
Note 2
Table 18-5: Voltage level detector operation
Note 1: absolute precision of the threshold voltage is
±10%.
Note 2: this timing is respected in case the internal RC or crystal oscillators are selected. Refer to the clock block
documentation in case the external clock is used.
To start the voltage level detection, the user sets bit VldEn. The measurement is started.After 2ms, the bit VldValid
is set to indicate that the measurement results are valid. From that time on, as long as the VLD is enabled, a
maskable interrupt request is sent if the voltage level falls below the threshold. One can also poll the VLD and
monitor the actual measurement result by reading the VldResult bit of the RegVldStat. This result is only valid as
long as the VldValid bit is ‘1’.
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