參數(shù)資料
型號(hào)： W25Q16VSFIG
廠商： WINBOND ELECTRONICS CORP
元件分類(lèi)： PROM
英文描述： 2M X 8 SPI BUS SERIAL EEPROM, PDSO16
封裝： 0.300 INCH, GREEN, PLASTIC, SOIC-16
文件頁(yè)數(shù)： 24/60頁(yè)
文件大?。?/td> 1438K
代理商： W25Q16VSFIG
W25Q16V
- 30 -
10.2.14 Octal Word Read Quad I/O (E3h)
The Octal Word Read Quad I/O (E3h) instruction is similar to the Fast Read Quad I/O (EBh) instruction
except that the lower four Address bits (A0, A1, A2, A3) must equal 0. As a result, the four dummy
clocks are not required, which further reduces the instruction overhead allowing even faster random
access for code execution (XIP). The Quad Enable bit (QE) of Status Register-2 must be set to enable
the Octal Word Read Quad I/O Instruction.
Octal Word Read Quad I/O with “Continuous Read Mode”
The Octal Word Read Quad I/O instruction can further reduce instruction overhead through setting the
“Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in figure 14a. The
upper nibble of the (M7-4) controls the length of the next Octal Word Read Quad I/O instruction through
the inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t
care (“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out
clock.
If the “Continuous Read Mode” bits (M7-0) equals “Ax” hex, then the next Octal Word Read Quad I/O
instruction (after /CS is raised and then lowered) does not require the E3h instruction code, as shown in
figure 14b. This reduces the instruction sequence by eight clocks and allows the Read address to be
immediately entered after /CS is asserted low. If the “Continuous Read Mode” bits (M7-0) are any value
other than “Ax” hex, the next instruction (after /CS is raised and then lowered) requires the first byte
instruction code, thus returning to normal operation. A “Continuous Read Mode” Reset instruction can
be used to reset (M7-0) before issuing normal instructions (See 10.2.29 for detailed descriptions).
Instruction (E3h)
Byte 1
Byte 2
Byte 3
Figure 14a. Octal Word Read Quad I/O Instruction Sequence (M7-0 = 0xh or NOT Axh)
40
4
0
40
51
5
1
51
62
6
2
62
73
7
3
73
40
51
62
73
Byte 4
Instruction (E3h)
Byte 1
Byte 2
Byte 3
40
4
0
40
51
5
1
51
62
6
2
62
73
7
3
73
40
51
62
73
Byte 4
相關(guān)PDF資料
PDF描述
W25Q32DWZPIP 256K X 16 SPI BUS SERIAL EEPROM, 7.5 ns, PDSO8
W25Q80VZPIG 1M X 8 SPI BUS SERIAL EEPROM, DSO8
W25X16AVDAIZ 2M X 8 FLASH 2.7V PROM, PDIP8
W25X40AVSSIG 512K X 8 FLASH 2.7V PROM, PDSO8
W25X80AVDAIZ 1M X 8 FLASH 2.7V PROM, PDIP8
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W25Q16VSSIG 功能描述:IC FLASH 16MBIT 80MHZ 8SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:SpiFlash® 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤(pán) 其它名稱:71P71804S200BQ
W25Q16VZPIG 制造商:WINBOND 制造商全稱:Winbond 功能描述:16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
W25Q20BW 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 2M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
W25Q20BWSNIG 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 2M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
W25Q20BWSNIP 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 2M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*