參數(shù)資料
型號: UPD70433R-12
廠商: NEC Corp.
元件分類: 16位微控制器
英文描述: V55PITM 16-BIT MICROPROCESSOR
中文描述: V55PITM 16位微處理器
文件頁數(shù): 47/166頁
文件大?。?/td> 772K
代理商: UPD70433R-12
47
μ
PD70433
5.2.3
Macro Service Function
The macro service function performs processing of simple data transfers, etc., by means of a microprogram (CPU internal
dedicated firmware) started by generation of an interrupt request. The simple, standardized interrupt servicing which was
coded and executed by a user program is performed automatically.
Macro service processing is caused by an interrupt request and is performed. Macro service is designed to minimize
as far as possible the frequency of generation of interrupts consisting mainly of software processing, hold down the software
overhead due to a series of processes used in an interrupt (register saving, initialization, register restoration, return from
the interrupt routine), and improve the CPU efficiency.
Processing performed by the macro service is transparent in terms of software, and it is possible to process as a single
mass of data what was previously processed by software byte by byte, allowing more efficient programming.
The V55PI macro service supports not only the simple data transfers used in the V25 and V35, but also various operating
modes closely linked to the on-chip V55PI peripheral hardware, as shown below.
(a) EVTCNT (EVENT COUNTER)
The counter is updated each time the macro service are generated, and when the counter reaches 0 the macro service
for the corresponding interrupt source is terminated and a vectored interrupt or a register bank switching is generated.
(b) DTACMP (DATA COMPARE)
The interrupt source specific SFR and preset byte data are compared, and if they match, the macro service for the
corresponding interrupt source is terminated and a vectored interrupt or register bank switching is generated.
(c) DTADIF (DATA DIFFERENCE)
The difference in using the timer/counter unit capture register is calculated. This is initiated by a timer interrupt: the
value of the capture register latched last time is subtracted from the value of the capture register latched this time, and
the result is stored in the previously specified memory buffer.
When processing has been performed the previously set number of times, the corresponding interrupt source macro
service is terminated, and a vectored interrupt or register bank switching is generated.
(d) BLKTRS (BLOCK TRANSFER)
A data transfer is performed between the previously specified memory buffer and SFR.
When the previously set number of data transfers have been performed, the corresponding interrupt source macro
service is terminated, and a vectored interrupt or register bank switching is generated.
(e) BLKTRS–C (BLOCK TRANSFER WITH CHARACTER SEARCH)
A data transfer is performed between the previously specified memory buffer and SFR. When the previously set
number of data transfers have been completed, or when the transfer data matches the previously set character data,
the corresponding interrupt source macro service is terminated, and a vectored interrupt or register bank switching is
generated.
(f) RTOPRTN (RTOP TRANSFER)
Data to be output to the real-time output port is transferred to the port 7 buffer (P7H, P7L), and data which specifies
interval for output to the real-time output port is transferred to the timer compare register (CM00, CM01).
(g) DTACMP-M (DATA COMPARE WITH CHARACTER MASK)
The logical product of the status data read from the external I/O and the previously set mask data is performed. The
previously set byte data is compared with the result. If it matches, a data transfer is performed between the external I/
O and memory. If it does not match, or if the previously set number of data transfers have been performed, the
corresponding interrupt source macro service is terminated, and a vectored interrupt or register bank switching is
generated.
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