
23
μ
PD70433
3.3
PROGRAM COUNTER (PC)
This is a 16-bit binary counter which holds the offset value of the program memory address on which the CPU is to perform
execution.
The PC is incremented each time an instruction code is fetched from the instruction queue, and is also loaded with the
new location address value when a branch, call, return or break instruction is executed.
When a reset is performed, 0000H is loaded into the PC. Because the PS register is initialized to FFFFH in a reset, after
a reset the CPU begins execution at physical address 0FFFF0H.
3.4
PROGRAM STATUS WORDS (PSW)
The PSW consists of 6 status flags and 5 control flags.
Status flags
V (Overflow)
S (Sign)
Z (Zero)
AC (Auxiliary Carry)
P (Parity)
CY (Carry)
Control flags
RB0 to RB3 (Register Banks 0 to 3) ...Register bankspecification flags
DIR (Direction)
IE (Interrupt Enable)
BRK (Break)
IBRK (I/O Break)
...Overflow detection flag
...Sign bit detection flag
...All zero detection flag
...4-bit carry/borrow detection flag
...Parity detection flag
...Carry/borrow detection flag
...Block transfer/input/output instruction direction control flag
...Interrupt enabled state control flag
...Single-step interrupt control flag
...Input/output instruction trap control flag
The status flags are set (1) or reset (0) automatically according to the result (data value) of execution of various kinds
of instructions. The CY flag can be directly set, reset or inverted by an instruction.
The control flags are set or reset by instructions, and control the operation of the CPU. The IE and BRK flags are always
reset when interrupt servicing is initiated.
The contents of the PSW can be saved to and restored from the stack by the PUSH and POP instructions. However,
when the contents are restored by the POP PSW instruction, bits 12 to 15 (RB0 to RB3) are not returned to the PSW.
The low-order 8 bits of the PSW can also be saved to or restored from the AH register by an MOV instruction.
The PSW bit configuration is shown below.
RB3
RB2
RB1
RB0
Y
DIR
IE
BRK
S
Z
0
AC
0
P
IBRK
CY
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0