
μ
P
1
Operation Code
Flags
Mnemonic
Operand(s)
Bytes
Operation
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
AC CY V
P
S
Z
AW
←
AL
×
reg8
AH = 0: CY
←
0, V
←
0
AH
≠
0: CY
←
1, V
←
1
reg8
1 1 1 1 0 1 1 0
1 1 1 0 0
reg
2
U
×
×
U
U
U
AW
←
AL
×
(mem8)
AH = 0: CY
←
0, V
←
0
AH
≠
0: CY
←
1, V
←
1
mem8
1 1 1 1 0 1 1 0
mod 1 0 0 mem
2 to 4
U
×
×
U
U
U
MULU
DW, AW
←
AW
×
reg16
DW = 0: CY
←
0, V
←
0
DW
≠
0: CY
←
1, V
←
1
reg16
1 1 1 1 0 1 1 1
1 1 1 0 0
reg
2
U
×
×
U
U
U
DW, AW
←
AW
×
(mem16)
DW = 0: CY
←
0, V
←
0
DW
≠
0: CY
←
1, V
←
1
mem16
1 1 1 1 0 1 1 1
mod 1 0 0 mem
2 to 4
U
×
×
U
U
U
AW
←
AL
×
reg8
AH = AL sign extension: CY
←
0, V
←
0
AH
≠
AL sign extension: CY
←
1, V
←
1
reg8
1 1 1 1 0 1 1 0
1 1 1 0 1
reg
2
U
×
×
U
U
U
AW
←
AL
×
(mem8)
AH = AL sign extension: CY
←
0, V
←
0
AH
≠
AL sign extension: CY
←
1, V
←
1
mem8
1 1 1 1 0 1 1 0
mod 1 0 1 mem
2 to 4
U
×
×
U
U
U
DW, AW
←
AW
×
reg16
DW = AW sign extension: CY
←
0, V
←
0
DW
≠
AW sign extension: CY
←
1, V
←
1
reg16
1 1 1 1 0 1 1 1
1 1 1 0 1
reg
2
U
×
×
U
U
U
DW, AW
←
AW
×
(mem16)
DW = AW sign extension: CY
←
0, V
←
0
DW
≠
AW sign extension: CY
←
1, V
←
1
mem16
1 1 1 1 0 1 1 1
mod 1 0 1 mem
2 to 4
U
×
×
U
U
U
MUL
reg16,
(reg16',)
*
imm8
reg16
←
reg16'
×
imm8
Product
≤
16 bits: CY
←
0, V
←
0
Product > 16 bits: CY
←
1, V
←
1
0 1 1 0 1 0 1 1
1 1
reg
reg'
3
U
×
×
U
U
U
reg16,
mem16,
imm8
reg16
←
(mem16)
×
imm8
Product
≤
16 bits: CY
←
0, V
←
0
Product > 16 bits: CY
←
1, V
←
1
0 1 1 0 1 0 1 1
mod reg
mem
3 to 5
U
×
×
U
U
U
reg16,
(reg16',)
*
imm16
reg16
←
reg16'
×
imm16
Product
≤
16 bits: CY
←
0, V
←
0
Product > 16 bits: CY
←
1, V
←
1
0 1 1 0 1 0 0 1
1 1
reg
reg'
4
U
×
×
U
U
U
reg16,
mem16,
imm16
reg16
←
(mem16)
×
imm16
Product
≤
16 bits: CY
←
0, V
←
0
Product > 16 bits: CY
←
1, V
←
1
0 1 1 0 1 0 0 1
mod reg
mem
4 to 6
U
×
×
U
U
U
M
*
The 2nd operand can be omitted, in which case the same register as the 1st operand is taken as being specified.
I
G