
μ
P
1
Operation Code
Flags
Mnemonic
Operand(s)
Bytes
Operation
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
AC CY V
P
S
Z
SCHEOL
0 0 0 0 1 1 1 1
0 1 1 1 1 0 0 0
2
"EOL" detection in MH/MR code
U
×
U
U
U
×
GETBIT
0 0 0 0 1 1 1 1
0 1 1 1 1 0 0 1
2
Fetches pixel data start bit and sets it to CY flag.
U
×
U
U
U
×
MHDEC
0 0 0 0 1 1 1 1
0 1 1 1 1 1 0 0
2
Generates change point table from MH code.
U
×
U
U
U
×
MRDEC
0 0 0 0 1 1 1 1
0 1 1 1 1 1 0 1
2
Generates change point table from MR code.
U
×
U
U
U
×
Converts 1 line change point information in change
point table to pixel data.
CNVTRP
0 0 0 0 1 1 1 1
0 1 1 1 1 0 1 0
2
HALT
1 1 1 1 0 1 0 0
1
CPU Halt
STOP
*1
0 0 0 0 1 1 1 1
1 0 0 1 1 1 1 0
2
CPU Stop
POLL
1 0 0 1 1 0 1 1
1
Poll and wait
DI
1 1 1 1 1 0 1 0
1
IE
←
0
EI
1 1 1 1 1 0 1 1
1
IE
←
1
BUSLOCK
1 1 1 1 0 0 0 0
1
Bus Lock Prefix
fp-op
1 1 0 1 1 X X X
1 1 Y Y Y Z Z Z
2
(SP – 1, SP – 2)
←
PSW, (SP – 3, SP – 4)
←
PS
FPO1
fp-op, mem
1 1 0 1 1 X X X
mod Y Y Y mem
2 to 4
(SP – 5, SP – 6)
←
PC – x
*6
, SP
←
SP – 6
fp-op
0 1 1 0 0 1 1 X
1 1 Y Y Y Z Z Z
2
IE
←
0, BRK
←
0
FPO2
fp-op, mem
0 1 1 0 0 1 1 X
mod Y Y Y mem
2 to 4
PC
←
(01DH; 01CH), PS
←
(01FH, 01EH)
NOP
1 0 0 1 0 0 0 0
1
No Operation
0 0 0 0 1 1 1 1
1 0 0 1 0 1 1 0
RSTWDT
*2
imm8, imm8
4
imm8
imm8
*4
0 0 1 sreg 1 1 0
1
Segment override prefix
DS2:
*2
0 1 1 0 0 0 1 1
1
Extended segment override prefix
DS3:
*2
1 1 0 1 0 1 1 0
1
Extended segment override prefix
IRAM:
*2
1 1 1 1 0 0 0 1
1
Register file override prefix
I
G
D
t
*3
*5
* 1.
This instruction is newly added to the V20 or V30.
This instruction is newly added to the V25 or V35.
Watchdog timer manipulation instruction
Four kinds: DS0:, DS1:, PS:, SS:
Register file space access override prefix instruction
x: Number of instruction bytes + number of prefixes
2.
3.
4.
5.
6.
When imm8 = imm8’
When imm8
≠
imm8’
WDM register
←
imm8
(SP – 1, SP – 2)
←
PSW, (SP – 3, SP – 4)
←
PS
(SP – 5, SP – 6)
←
PC – x
*6
, SP
←
SP – 6
IE
←
0, BRK
←
0
PC
←
(20H, 21H), PS
←
(22H, 23H)
C