- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄368631 > TDA935X (NXP Semiconductors N.V.) TV signal processor-Teletext decoder with embedded m-Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | TDA935X |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | TV signal processor-Teletext decoder with embedded m-Controller |
| 中文描述： | 電視信號(hào)處理器與嵌入式米圖文電視解碼器控制器 |
| 文件頁(yè)數(shù)： | 47/140頁(yè) |
| 文件大小： | 570K |
| 代理商： | TDA935X |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)當(dāng)前第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)
Philips Semiconductors
Preliminary specification
1999 Sep 28
47
TV signal processor-Teletext decoder with
embedded
μ
-Controller
TDA 935X/6X/8X series
VPS A
CQUISITION
When the TXT0. VPS ON bit is set, any VPS data present on line 16, field 0 of the CVBS signal at the input of
the teletext decoder is error checked and stored. The device automatically detects whether teletext or VPS is
being transmitted on this line and decodes the data appropriately
Figure 18 VPS Data Storage
Each VPS byte in the memory consists of 4 biphase decoded data bits (bits 0-3), a biphase error flag (bit 4) and
three 0s (bits5-7).
The TXT13. VPS Received bit is set by the hardware whenever VPS data is acquired. The flag can be reset by
writing a logic 0 into the SFR bit.
Full details of the VPS system can be found in Reference [5].
WSS A
CQUISITION
The Wide Screen Signalling data transmitted on line 23 gives information on the aspect ratio and display
position of the transmitted picture, the position of subtitles and on the camera/film mode. Some additional bits
are reserved for future use. A total of 14 data bits are transmitted.
All of the available data bits transmitted by the Wide Screen Signalling signal are captured and stored in SFR’s
WSS1, WSS2 and WSS3. The bits are stored as groups of related bits and an error flag is provided for each
group to indicate when a transmission error has been detected in one or more of the bits in the group.
Wide screen signalling data is only acquired when the TXT8.WSS ON bit is set.
The TXT8.WSS RECEIVED bit is set by the hardware whenever wide screen signalling data is acquired. The
flag can be reset by writing a logic 0 into the SFR bit.
C
LOSED
C
APTION
A
CQUISITION
The US Closed Caption data is transmitted on line 21 (525 line timings) and is used for Captioning information,
Text information and Extended Data Services. Full Details can be found in Reference [6].
Closed Caption data is only acquired when TXT21.CC ON bit is set
Two bytes of data are stored per field in SFR’s, the first bye is stored in CCDAT1 and the second byte is stored
in CCDAT2. The value in the CCDAT registers are reset to 00h at the start of the Closed Caption line defined
by CCLIN.CS<4:0>. At the end of the Closed Caption line an interrupt is generated if IE.ECC is active.
The processing of the Closed Caption data to convert into a displayable format is performed by the embedded
Software.
Teletext page
header data
VPS
byte 11
VPS
byte 12
VPS
byte 13
VPS
byte 14
VPS
byte 15
VPS
VPS
byte 5
9 10 11
12 13 14
15 16 17 18 19 20 21
22 23
column
row 25
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA936X | TV signal processor-Teletext decoder with embedded m-Controller |
| TDA938X | TV signal processor-Teletext decoder with embedded m-Controller |
| TDA9829T | Downconverter For DVB(下變頻器 （DVB應(yīng)用）) |
| TDAT04622 | TDAT SONET/SDH 155/622/2488 Mbits/s Data Interfaces |
| TDAT042G51A-3BLL1 | TDAT SONET/SDH 155/622/2488 Mbits/s Data Interfaces |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA9380 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:TDA938O超級(jí)芯片將微處理器(CPU)與TV信號(hào)處理器集成在一起 |
| TDA9383 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述: |
| TDA9400 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:INTEGRATED CIRCUITS FOR TV AND RADIO RECEVERS |
| TDA9403 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:INTEGRATED CIRCUITS FOR TV AND RADIO RECEVERS |
| TDA9500 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:INTEGRATED CIRCUITS FOR TV AND RADIO RECEVERS |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。