參數(shù)資料
型號： TDA935X
廠商： NXP Semiconductors N.V.
英文描述： TV signal processor-Teletext decoder with embedded m-Controller
中文描述： 電視信號處理器與嵌入式米圖文電視解碼器控制器
文件頁數(shù)： 33/140頁
文件大小： 570K
代理商： TDA935X
Philips Semiconductors
Preliminary specification
1999 Sep 28
33
TV signal processor-Teletext decoder with
embedded
μ
-Controller
TDA 935X/6X/8X series
P
ORT TYPE
All individual ports bits can be programmed to function in one of four modes, the mode is defined by eight Port
Configuration SFR’s (P0CFGA/P0CFGB, P1CFGA/P1CFGB, P2CFGA/P2CFGB and P3CFGA/P3CFGB). The
modes available are Open Drain, Quasi-bidirectional, High Impedance, Push-Pull.
Open Drain
The Open drain mode can be used for bi-directional operation of a port. It requires an external pull-up resistor,
the pull-up voltage has a maximum value of 5.5V, to allow connection of the device into a 5V environment.
Quasi-bidirectional
The quasi-bidirectional mode is a combination of open drain and push pull. It requires an external pull-up resistor
to VDDp (nominally 3.3V). When a signal transition from 0 to 1 is output from the device, the pad is put into push-
pull mode for one clock cycle (166ns) after which the pad goes into open drain mode. The mode may be used
to speed up the edges of signal transitions. This is the default mode of operation of the pads after reset.
High Impedance
The high impedance mode can be used for Input only operation of the port. When using this configuration the
two output transistors are turned off.
Push-Pull
The push pull mode can be used for output only. In this mode the signal is driven to either 0V or VDDp, which
is nominally 3.3V.
Interrupt System
The device has 7 interrupt sources, each of which can be enabled or disabled. When enabled each interrupt
can be assigned one of two priority levels. There are four interrupts that are common to the 80C51, two of these
are external interrupts (EX0 and EX1) and the other two are timer interrupts (ET0 and ET1). In addition to the
conventional 80c51, two application specific interrupts are incorporated internal to the device which have
following functionality:-
ECC (Closed Caption Data Ready Interrupt) - This interrupt is generated when the device is configured in
Closed Caption Acquisition mode. The interrupt is activated at the end of the currently selected Slice Line as
defined in the CCLIN SFR.
EBUSY (Display Busy Interrupt) - An interrupt is generated when the Display enters either a Horizontal or
Vertical Blanking Period. i.e. Indicates when the micro-controller can update the Display RAM without causing
undesired effects on the screen. This interrupt can be configured in one of two modes using the MMR
Configuration Register (Address 87FF, Bit-3 [TXT/V]):-
TeXT Display Busy: An interrupt is generated on each active horizontal display line when the Horizontal
Blanking Period is entered.
Vertical Display Busy: An interrupt is generated on each vertical display field when the Vertical Blanking
Period is entered.
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