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參數(shù)資料
| 型號(hào)： | TDA935X |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | TV signal processor-Teletext decoder with embedded m-Controller |
| 中文描述： | 電視信號(hào)處理器與嵌入式米圖文電視解碼器控制器 |
| 文件頁(yè)數(shù)： | 43/140頁(yè) |
| 文件大小： | 570K |
| 代理商： | TDA935X |
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Philips Semiconductors
Preliminary specification
1999 Sep 28
43
TV signal processor-Teletext decoder with
embedded
μ
-Controller
TDA 935X/6X/8X series
TXT D
ISPLAY MEMORY
MOVX
ACCESS
It is important for the generation of OSD displays, that use this mode of access, to understand the mapping of
the MOVX address onto the display row and column value. This mapping of row and column onto address is
shown inTable 11. The values shown are added onto a base address for the required memory block (see Figure
15) to give a 16-bit address-
Page Clearing
Page Clearing is performed on request from either the Data Capture block, or the Microcontroller under the
control of the embedded software.
At power on and reset the whole of the page memory is cleared. TheTXT13.PAGE CLEARING bit will be set
while this takes place.
D
ATA
C
APTURE
P
AGE
C
LEAR
When a page header is acquired for the first time after a new page request or a page header is acquired with
the erase (C4) bit set the page memory is ‘cleared’ to spaces before the rest of the page arrives.
When this occurs, the space code (20h) is written into every location of rows 1 to 23 of the basic page memory,
the appropriate packet 27 row of the extension packet memory and the row where teletext packet 24 is written.
This last row is either row 24 of the basic page memory, if the TXT0.X24 POSN bit is set, or the relevant row of
the extension packet memory, if the bit is not set. Page clearing takes place before the end of the TV line in
which the header arrived which initiated the page clear. This means that the 1 field gap between the page
header and the rest of the page which is necessary for many teletext decoders is not required.
S
OFTWARE
P
AGE
C
LEAR
The software can also initiate a page clear, by setting the TXT9.CLEAR MEMORY bit. When it does so, every
location in the memory block pointed to by TXT15.BLOCK<3:0> is cleared. The CLEAR MEMORY bit is not
latched so the software does not have to reset it after it has been set.
Only one page can be cleared in a TV line, so if the software requests a page clear it will be carried out on the
next TV line on which the Data Capture hardware does not force the page to be cleared. A flag, TXT13.PAGE
CLEARING, is provided to indicate that a software requested page clear is being carried out. The flag is set
when a logic ’1’ is written into the TXT9.CLEAR MEMORY bit and is reset when the page clear has been
completed.
‘Movx’
Addresses
shown in Hex.
Col.
0
.....
Col.
23
.....
Col.
31
Col.
32
.....
Col.
39
Row 0
000
.....
017
.....
01F
3F8
.....
3FF
Row 1
020
.....
037
.....
03F
3F0
.....
3F7
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
Row 23
2E0
.....
3F7
.....
2FF
340
.....
347
Row 24
300
.....
317
.....
31F
338
.....
33F
Row 25
Table 11 Column and Row to ‘Movx’ Address (Lower 10 bits of Address)
320
.....
337
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