參數(shù)資料
型號(hào)： SAA6713H
廠商： NXP Semiconductors N.V.
英文描述： XGA dual input flat panel controller
中文描述： 雙輸入的XGA液晶控制器
文件頁數(shù)： 93/103頁
文件大小： 521K
代理商： SAA6713H
2004 Apr 05
93
Philips Semiconductors
Product specification
XGA dual input flat panel controller
SAA6713H
Output pins
D
ATA PORTS AND PANEL CONTROL SIGNALS
:
PINS
PD0
TO
PD7, PE0
TO
PE7, PF0
TO
PF7, CSG0, CSG1, CSG3,
CSG5
TO
CSG9, INVA, INVB, PCLK, PWM
AND
OUTEN
V
OL
V
OH
I
pu
LOW-level output voltage
HIGH-level output voltage
pull-up current
I
OL
= 16 mA
I
OH
=
16 mA
V
i
= 0
V
DD
< V
i
<V
DDD(EP)
;
note 5
V
DDD(EP)
0.4
23
50
0
0.4
65
V
V
μ
A
μ
A
G
ENERAL CONTROLS
:
PINS
INT
AND
TDO
V
OL
V
OH
Input or output pins
LOW-level output voltage
HIGH-level output voltage
I
OL
= 4 mA
I
OH
=
4 mA
V
DDD(EP)
0.4
0.4
V
V
D
ATA PORTS
,
PANEL CONTROL SIGNALS
,
SAMPLE CLOCK AND VERTICAL SYNC PULSES
:
PINS
PA0
TO
PA7, PB0
TO
PB7,
PC0
TO
PC7, CSG2/A0
AND
CSG4/A1
V
IL
V
IH
V
OL
V
OH
I
pu
LOW-level input voltage
HIGH-level input voltage
LOW-level output voltage
HIGH-level output voltage
pull-up current
0
2.0
0
V
DDD(EP)
0.4
23
50
0
0.8
3.6
0.4
V
DDD(EP)
65
V
V
V
V
μ
A
μ
A
I
OL
= 16 mA
I
OH
=
16 mA
V
i
= 0
V
DD
< V
i
<V
DDD(EP)
;
note 5
C
i
V
ERTICAL SYNC INPUT OR OUTPUT
:
PIN
VSYNC
input capacitance
8
pF
V
IL
V
IH
V
OL
V
OH
I
pd
C
i
S
AMPLE CLOCK
:
PIN
VCLK
LOW-level input voltage
HIGH-level input voltage
LOW-level output voltage
HIGH-level output voltage
pull-down current
input capacitance
0
2.0
0
V
DDD(EP)
0.4
18
50
0.8
5.5
0.4
V
DDD(EP)
53
8
V
V
V
V
μ
A
pF
I
OL
= 2 mA
I
OH
=
2 mA
V
i
= 5 V; note 6
V
IL
V
IH
V
OL
V
OH
I
OZ
LOW-level input voltage
HIGH-level input voltage
LOW-level output voltage
HIGH-level output voltage
3-state output leakage current
0
1.7
0
V
DDD(EP)
0.4
0.7
V
DDD(EP)
0.4
V
DDD(EP)
1
V
V
V
V
μ
A
I
OL
= 4 mA
I
OH
=
4 mA
V
IH
= V
DDD(EP)
;
V
IL
= 0
C
i
input capacitance
8
pF
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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