- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385813 > SAA6713H (NXP Semiconductors N.V.) XGA dual input flat panel controller PDF資料下載
參數(shù)資料
| 型號(hào)： | SAA6713H |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | XGA dual input flat panel controller |
| 中文描述： | 雙輸入的XGA液晶控制器 |
| 文件頁(yè)數(shù)： | 81/103頁(yè) |
| 文件大?。?/td> | 521K |
| 代理商： | SAA6713H |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)當(dāng)前第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)
2004 Apr 05
81
Philips Semiconductors
Product specification
XGA dual input flat panel controller
SAA6713H
7.17.3
D
ATA TO OUTPUT MAPPING
Each colour of each pixel is handled separately. In double
pixelmodethereare6 bytes(red,greenandblueofpixel 0
and pixel 1 from which pixel 0 arrives first). In single pixel
mode there are 3 bytes (red, green and blue of pixel 0).
Each of the six output ports (see Fig.27) can be connected
to each colour and can be inverted, swapped and aligned
to the MSB (sensible to drive 6-bit panels).
Registers OI_B0R, OI_B0G, OI_B0B, OI_B1R, OI_B1G
and OI_B1B have to be programmed according to
Table 55.
handbook, full pagewidth
BLANK
GENERATION,
BORDER
GENERATION,
TRANSITION
MINIMIZING
MSB
LSB
PA
PB
PC
PD
PE
PF
MHC234
R0
G0
B0
2
6
R1
G1
B1
8 bits
each
48 bits
Fig.27 Data to output mapping schema.
Table 55
Data to output mapping; note 1
Note
1.
X = don’t care.
BIT
FUNCTION
ACTION
MSB_align
swap
inv
port_x_conf[2:0]
alignment
swapping
inversion
allocation
If this bit is set to logic 1, then the lower 6 bits are aligned to MSB.
If this bit is set to logic 1, then swap [7:0] to [0:7]; LSB becomes MSB.
If this bit is set to logic 1, then bit wise inversion of the colour component.
Output port Px gets data byte with 6 bytes in double pixel mode or 3 bytes in
single pixel mode (for x = A to F):
11X: 0R
101: 0G
100: 0B
01X: 1R
001: 1G
000: 1B
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7110 | Digital Multistandard Colour Decoder(數(shù)字多標(biāo)準(zhǔn)彩色譯碼器) |
| SAA7111 | Video Input Processor VIP |
| SAA7120H | Digital video encoder |
| SAA7152 | Digital Video Comb Filter DCF |
| SAA7184 | Digital Video Encoders DENC2-M6 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA6713H/V1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA dual input flat panel controller |
| SAA6721 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SXGA RGB to TFT graphics engine |
| SAA6721E | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SXGA RGB to TFT graphics engine |
| SAA6750 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE |
| SAA6750H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。