參數(shù)資料
型號(hào)： SAA6713H
廠商： NXP Semiconductors N.V.
英文描述： XGA dual input flat panel controller
中文描述： 雙輸入的XGA液晶控制器
文件頁數(shù)： 20/103頁
文件大?。?/td> 521K
代理商： SAA6713H
2
2
P
P
X
S
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Note
1.
X = don’t care.
Table 11
Input interface configuration registers (page 4)
REGISTER
ADR R/W
RESET
D7
D6
D5
D4
D3
D2
D1
D0
Input interface: 00H to 0FH
II_CTRL
00H
W
0
00 0101 test_out_
en
reverse_
field_id
dvi_de_
auto_adj
interlace_
on
test_pic_on ext_select
dvi_select
in_form_on
II_SYNC_CTRL
01H
W
110
011 sync_clk_
edge
ext_clk_
edge
convert_2s dvi_use_
hsync_
edge
clamp_en
vs_pol
hs_pol
II_ADC_CTRL
02H
W
1001 1111 delay_vs
hsync
dvi_de_pol gainc_en
gainc_pol
clamp_pol
II_CLAMP_ON
II_CLAMP_OFF
II_GAINC_ON
II_GAINC_OFF
II_HLEN_HI
II_HLEN_LO
II_VLEN_HI
II_VLEN_LO
II_HOFF_HI
II_HOFF_LO
II_VOFF_HI
II_VOFF_LO
II_HJIT
03H
04H
05H
06H
07H
08H
09H
0AH W
0BH W
0CH W
0DH W
0EH W
0FH W
W
W
W
W
W
W
W
02H
05H
01H
01H
0000
3CH
0000
28H
0000
00H
0000
00H
05H
clamp_on_delay[7:0]
clamp_off_delay[7:0]
gainc_on_delay[7:0]
gainc_off_delay[7:0]
in_h_length[11:8]
in_h_length[7:0]
in_v_length[11:8]
in_v_length[7:0]
in_h_offset[11:8]
in_h_offset[7:0]
in_v_offset[11:8]
in_v_offset[7:0]
hs_jitter_th[7:0]
Picture generator: 10H to 1CH
PG_CTRL
10H
W
0010 0010 invert
white_
border
h_ramp_r
h_ramp_g
h_ramp_b
v_ramp_r
v_ramp_g
v_ramp_b
PG_HTOTAL_HI
PG_HTOTAL_LO
PG_VTOTAL_HI
PG_VTOTAL_LO
PG_HSTEP1
PG_HINC1
11H
12H
13H
14H
15H
16H
W
W
W
W
W
W
0000
51H
0000
35H
01H
02H
h_length_total[11:8]
h_length_total[7:0]
v_length_total[11:8]
v_length_total[7:0]
h_step1[7:0]
h_colour_inc1[7:0]
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA6713H/V1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA dual input flat panel controller
SAA6721 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SXGA RGB to TFT graphics engine
SAA6721E 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SXGA RGB to TFT graphics engine
SAA6750 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE
SAA6750H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE
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