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參數(shù)資料
| 型號(hào)： | S1C88409D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.8 MHz, MICROCONTROLLER, UUC108 |
| 封裝： | DIE-108 |
| 文件頁(yè)數(shù)： | 98/250頁(yè) |
| 文件大?。?/td> | 1877K |
| 代理商： | S1C88409D |
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S1C88409 TECHNICAL MANUAL
EPSON
177
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
5.18.3 Mask option
Pull-up resistor
I/O port pull-up resistor
P30 (AD0)
s
s With resistor
Gate direct
P31 (AD1)
s
s With resistor
Gate direct
P32 (AD2)
s
s With resistor
Gate direct
P33 (AD3)
s
s With resistor
Gate direct
P34 (AD4)
s
s With resistor
Gate direct
P35 (AD5)
s
s With resistor
Gate direct
P36 (AD6)
s
s With resistor
Gate direct
P37 (AD7)
s
s With resistor
Gate direct
The input terminals of the A/D converter are
shared with the I/O port terminals P30–P37.
Therefore, the terminal specification of the A/D
converter is decided by setting the I/O port mask
option. Select "Gate direct" for the port corre-
sponding to the channel to be used to obtain the
conversion precision.
5.18.4 Control of A/D converter
Setting of A/D input terminal
When using the A/D converter, it is necessary to
set up the terminals used for analog input from the
P30–P37 initialized as the I/O port terminals.
Eight terminals can all be used as analog input
terminals. However, one of the AD6 (P36) and AD7
(P37) terminals or both cannot be used as the
analog input terminal of the A/D converter when
the D/A converter is used, because it is used as the
analog output terminal.
The PAD (PAD0–PAD7) register is used to set
analog input terminals. When the PAD register bits
are set to "1", the corresponding terminals function
as the analog input terminals. When using the P36
terminal as an analog input terminal, write "1" to
PAD6 and write "0" to PDA6 (for setting an analog
output terminal of the D/A converter) to disable
the analog output.
When both the PAD6 and PDA6 registers are set to
"1", the P36 terminal is set for analog output, and it
cannot be used with the A/D converter. It is the
same for the P37 terminal. Set PAD7 to "1" and
PDA7 to "0".
Table 5.18.4.1 Correspondence between A/D input
terminal and PAD register
Terminal
P30 (AD0)
P31 (AD1)
P32 (AD2)
P33 (AD3)
P34 (AD4)
P35 (AD5)
P36 (AD6)
P37 (AD7)
A/D input control register
PAD0
PAD1
PAD2
PAD3
PAD4
PAD5
PAD6
PAD7
Remarks
Set PDA6 to "0"
Set PDA7 to "0"
The touch panel controller uses two terminals from
P30 to P35 for inputting coordinate signals. These
two terminals are selected by mask option and
fixed as the analog signal input terminals. Thus
the above software settings are unnecessary.
At initial reset, the terminal except for 2 channels
of the touch panel controller are set as I/O ports
and goes to high-impedance status.
Setting of input clock
As explained in Section 5.5, "Prescaler and Clock
Control Circuit for Peripheral Circuits", the A/D
conversion clock can be selected from 5 types
shown in Table 5.18.4.2. The selection is done
using the PSAD register.
Table 5.18.4.2 Input clock selection
Division
ratio
fOSC3/16
fOSC3/8
fOSC3/4
fOSC3/2
fOSC3/1
Output
control
PRAD
register
"1": ON
"0": OFF
PSAD2
1
0
Selection register
PSAD1
×
1
0
PSAD0
×
1
0
1
0
The prescaler outputs the selected clock to the
A/D converter by writing "1" to the PRAD register.
Note: The prescaler can output a clock to the
A/D converter only when the OSC3
oscillation goes on. (Refer to Section 5.5,
"Prescaler and Clock Control Circuit for
Peripheral Circuits".)
The frequency of the input clock should
be lower than the maximum value shown
in Section 8.7, "A/D Converter Character-
istics".
The input clock should be set when the
A/D converter stops. Changing in the A/D
converter operation may cause a mal-
function.
To prevent malfunction, do not start A/D
conversion (writing to the CHS register)
when the A/D conversion clock is not
being output from the prescaler, and do
not turn the prescaler output clock off
during A/D conversion.
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