
S1C88409 TECHNICAL MANUAL
EPSON
181
CHAPTER 5: PERIPHERAL CIRCUITS AND OPERATION (A/D Converter)
Table 5.18.6.1(b) A/D converter control bits
00FFE8
P37 A/D converter input control
P36 A/D converter input control
P35 A/D converter input control
P34 A/D converter input control
P33 A/D converter input control
P32 A/D converter input control
P31 A/D converter input control
P30 A/D converter input control
R/W
0
I/O port
A/D converter
input
PAD7
PAD6
PAD5
PAD4
PAD3
PAD2
PAD1
PAD0
D7
D6
D5
D4
D3
D2
D1
D0
00FFE9
P37 D/A converter output control
P36 D/A converter output control
–
R/W
–
0
–
I/O port
–
D/A converter
output
–
"0" when being read
PDA7
PDA6
–
D7
D6
D5
D4
D3
D2
D1
D0
00FF81
A/D conversion result
R
–
ADDR9
ADDR8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
D7
D6
D5
D4
D3
D2
D1
D0
D9(MSB)
D8
D7
D6
D5
D4
D3
D2
00FF82
–
A/D conversion result
–
R
–
"0" when being read
–
ADDR1
ADDR0
D7
D6
D5
D4
D3
D2
D1
D0
D1
D0(LSB)
Address
Function
R/W
Init
0
1
Comment
Name
Bit
PAD0–PAD7: A/D converter input control
register (00FFE8H)
Sets the P30–P37 terminals as the analog input
terminals for the A/D converter.
When "1" is written: A/D converter input
When "0" is written: I/O port
Reading: Valid
When "1" is written to PADn, the P3n terminal is
set to the analog input terminal ADn. (n=0–7)
When "0" is written, the terminal is used with the
I/O port.
At initial reset, the PAD register is set to "0" (I/O
port).
PDA6, PDA7: D/A converter output control
register (00FFE9HD6, D7)
The PDA6 and PDA7 registers set the P36 and P37
terminals to the analog output terminal of the D/A
converter, respectively. Those register settings
have priority over the PAD6 and PAD7 settings.
Therefore, when using the P36 terminal (P37
terminal) as the analog input for the A/D con-
verter, fix the PDA6 (PDA7) register at "0".
At initial reset, the PDA register is set to "0" (I/O
port).
PSAD0–PSAD2: A/D converter division ratio
selection register (00FF13HD0–D2)
Selects the clock for the A/D converter.
Table 5.18.6.2 Input clock selection
Division ratio
fOSC3/16
fOSC3/8
fOSC3/4
fOSC3/2
fOSC3/1
PSAD2
1
0
PSAD1
×
1
0
PSAD0
×
1
0
1
0
This setting controls the division ratio of the
prescaler.
At initial reset, the PSAD register is set to "0"
(fOSC3/1).