參數(shù)資料
型號(hào): S1C88409D
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.8 MHz, MICROCONTROLLER, UUC108
封裝: DIE-108
文件頁(yè)數(shù): 146/250頁(yè)
文件大?。?/td> 1877K
代理商: S1C88409D
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S1C88409 TECHNICAL MANUAL
EPSON
13
CHAPTER 3: CPU AND MEMORY
CHAPTER
3 CPU AND MEMORY
This section explains the CPU, operating mode and bus configuration.
3.2.2 RAM (Data Memory, Display Memory)
The internal RAM has a capacity of 3.75KB.
The data memory size and display memory size
can be selected as shown in Table 3.2.2.1 by mask
option.
Table 3.2.2.1 RAM size setting by mask option
Data memory
1792 bytes
00F800H–00FEFFH
1536 bytes
00F900H–00FEFFH
1280 bytes
00FA00H–00FEFFH
1024 bytes
00FB00H–00FEFFH
768 bytes
00FC00H–00FEFFH
512 bytes
00FD00H–00FEFFH
256 bytes
00FE00H–00FEFFH
Display memory
2048 bytes
00F000H–00F7FFH
2304 bytes
00F000H–00F8FFH
2560 bytes
00F000H–00F9FFH
2816 bytes
00F000H–00FAFFH
3072 bytes
00F000H–00FBFFH
3328 bytes
00F000H–00FCFFH
3584 bytes
00F000H–00FDFFH
1
2
3
4
5
6
7
The internal RAM area is not released to external
memory even when the external memory which
overlaps the internal RAM area is expanded.
Access to this area affects the internal RAM.
Note: The display memory area configured by
mask option may be used as data memory.
However, the stack area cannot be as-
signed there.
Refer to Section 5.10, "LCD Controller", for details
of the display memory.
3.2.3 I/O memory
A memory mapped I/O method is adopted in the
S1C88409 for interface with internal peripheral
circuits. The control bits and data registers of the
peripheral circuits are arranged in the data
memory space. Control and data transfer can be
done with normal memory access instructions.
I/O memory area is arranged in 00FF00H–
00FFFFH. Refer to Section 5.1, "I/O Memory Map",
for details of the I/O memory.
The I/O memory area is not released to the
external memory even when the external memory
which overlaps the I/O memory area is expanded.
Access to this area affects the I/O memory.
3.1 CPU
The S1C88409 employs the 8-bit core CPU S1C88
as the CPU, so that register configuration, instruc-
tions and so on are virtually identical to those in
other family processors using the S1C88.
Refer to the "S1C88 Core CPU Manual" for details
of the S1C88.
The S1C88 CPU model used is Model 3 and has up
to 4M
× 3 address space that can be used for
extended memory.
3.2 Internal Memory
The S1C88409 has built-in ROM and RAM as
shown in Figure 3.2.1.
Small-scale applications can be realized with only
this chip. The internal memory can be used
together with the external memory.
Furthermore, the internal ROM can be discon-
nected from the bus so that the space is released to
external memory.
00FFFFH
00FF00H
00FEFFH
00F000H
I/O memory
RAM
(Display memory)
RAM
(Data memory)
00FFFFH
00F000H
00EFFFH
:
002000H
001FFFH
000000H
RAM, I/O memory
ROM (8K-byte)
Unused area
See Section 3.2.2, "RAM (Data Memory,
Display Memory)", for the capacity and
address of the RAM.
Fig. 3.2.1 Internal memory map
3.2.1 ROM
The internal ROM has a capacity of 8KB.
Depending on the setting of the MCU/MPU
terminal, the internal ROM area can be released to
external memory. (See Section 3.5, "Chip Mode".)
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