
A
B
C
H
E
D
F
G
I
J
K
L
M
N
O
P
Q
R
S
T
U
V W X
Y
Z
PRODUCT SPECIFICATION
Index-3
locking registers
5-5
LRU replacement
5-11
memory hole
5-5
miss processing order
5-4
,
5-9
miss transfer order
5-3
MMIO registers summary
5-13
noncachable region
5-3
non-cacheable region
5-5
number of sets
5-3
operation ordering
5-7
overview
5-1
overview,memory system
5-1
parameters
5-3
partial word transfers
5-4
partial words
5-3
performance evaluation support
5-12
performance events
table
5-13
ports
5-3
rdstatus result format
5-6
rdtag result format
5-6
replacement policies
5-3
,
5-4
replacement policy
5-9
scheduling constraint
5-4
set
5-3
size
5-3
special data cache operations
5-6
special opcodes
5-4
special operation ordering
5-7
status operations
5-6
,
5-7
summary of characteristics
5-2
tag field of address
5-3
tag operations
5-6
,
5-7
valid bits
5-3
word in set
5-3
write misses
5-4
cache line size
PCI interface register
11-6
carry
A-17
CCCOUNT
definition
3-3
CCIR 656
line timing
description
7-4
pixel timing
description
7-4
video connector on Enhanced Video Out
Unit,picture
7-2
CCIR 656 frame timing
description
7-6
description table
7-6
CCIR 656 line timing
picture
7-5
CCIR 656 pixel timing
picture
7-5
CCIR656 serial D1
7-2
chroma
keying
14-1
Chroma keying
7-14
chroma keying
14-1
,
14-9
circuit board design
guidelines
12-6
class code
PCI interface register
11-6
Clipping
7-14
codec
8-1
coherency
5-4
coherency,instruction cache
5-9
command ID
PCI interface register
11-3
compatibility
software
3-4
concurrency
PCI interface
11-3
concurrency,hidden
5-7
CONFIG_ADR
PCI interface MMIO register
11-12
picture
11-10
CONFIG_CTL
PCI interface MMIO register
11-13
picture
11-10
CONFIG_DATA
PCI interface MMIO register
11-12
configuration header
11-3
configuration operations
PCI interface
11-2
control word
ICP vertical filter
14-25
of ICP
14-23
conversion
interspersed to co-sited
7-11
to RGB
14-1
to YUV composite
14-1
YUV to RGB
14-3
,
14-9
copyback
5-4
co-sited sampling
6-4
counter
3-12
CPU stall
5-8
curcycles
A-18
cycles
A-19
D
D1 serial
7-2
data address fields
5-3
data breakpoint
3-13